mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 197
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mfr4300
Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MFR4300.pdf
(266 pages)
- Current page: 197 of 266
- Download datasheet (2Mb)
If the slot status counter is in single cycle mode, i.e. SSCCRn.MCY = ‘0’, the internal slot status counter
SSCRn_INT is reset at each cycle start. If the slot status counter is in the multicycle mode, i.e.
SSCCRn.MCY = ‘1’, the counter is not reset and incremented, until the maximum value is reached.
3.4.18.5
Each individual message buffer and each FIFO message buffer provides a slot status field, which provides
the information shown in
field depend on the message buffer type. Refer to the Message Buffer Update Sections in
“Individual Message Buffer Functional
3.4.19
The FlexRay module provides 172 individual interrupt sources and five combined interrupt sources.
3.4.19.1
3.4.19.1.1
The FlexRay module provides 128 message buffer interrupt sources.
Each individual message buffer provides an interrupt flag MBCCSn.MBIF and an interrupt enable bit
MBCCSn.MBIE. The FlexRay module sets the interrupt flag when the slot status of the message buffer
was updated. If the interrupt enable bit is asserted, an interrupt request is generated.
3.4.19.1.2
The FlexRay module provides 2 Receive FIFO interrupt sources.
Each of the 2 Receive FIFO provides a Receive FIFO Not Empty Interrupt Flag. The FlexRay module sets
the Receive FIFO Not Empty Interrupt Flags (GIFER.FNEBIF, GIFER.FNEAIF) in the
Flag and Enable Register (GIFER)
3.4.19.1.3
The FlexRay module provides one interrupt source related to the wakeup.
The FlexRay module sets the Wakeup Interrupt Flag GIFER.WUPIF when it has received a wakeup
symbol on the FlexRay bus. The FlexRay module generates an interrupt request if the interrupt enable bit
GIFER.WUPIE is asserted.
3.4.19.1.4
The FlexRay module provides 25 interrupt sources for protocol related events. For details, see
Interrupt Flag Register 0 (PIFR0)
has its own interrupt enable bit.
Freescale Semiconductor
(SSCCRn.STATUSMASK[0] & vSS!TxConflict)) // increment on transmission conflict
= ‘1’;
Interrupt Support
Message Buffer Slot Status Field
Individual Interrupt Sources
Message Buffer Interrupts
Receive FIFO Interrupts
Wakeup Interrupt
Protocol Interrupts
Table 3-109
and
if the corresponding Receive FIFO is not empty.
for the static/dynamic slot. The update conditions for the slot status
Protocol Interrupt Flag Register 1
Description”.
MFR4300 Data Sheet, Rev. 3
(PIFR1). Each interrupt source
FlexRay Module (FLEXRAYV2)
Global Interrupt
Section 3.4.6,
Protocol
197
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