msm62x42b Oki Semiconductor, msm62x42b Datasheet

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msm62x42b

Manufacturer Part Number
msm62x42b
Description
Real Time Clock Ic With Built-in Crystal
Manufacturer
Oki Semiconductor
Datasheet

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¡ Semiconductor
¡ Semiconductor
MSM62X42B
REAL TIME CLOCK IC WITH BUILT-IN CRYSTAL
DESCRIPTION
The MSM62X42B is a bus-connection Micro-
computer peripheral IC of a Real Time Clock
with built-in crystal in the perpetual calendar
which can be read and written from a second
unit. The interface between this IC and a
microcomputer uses 4 data buses, 4 address
buses, 3 control buses and 2 chip selects and
carries out setting up, amending and reading
time.
ALE input is available for 8048 system, 8051
system or 8085 system and is used for other
microcomputers if this input is fixed at "H".
FEATURES
• 32.768kHz built-in crystal oscillator
• Real time clock of second, minute, date,
• Interface corresponding to microcom-
• 30-second compensation controlled by
• Periodical interrupt function (or
PIN CONFIGURATION
(2 ranks of 10PPM and 50PPM ---
DIP)
(2 ranks of 20PPM and 50PPM ---
SOP)
month, year and day of week
puter bus
software
periodical waveform output) for alarm
Note: The actual type name indicates the abbreviated one, M62X42B.
STD.P 1
GND
CS
ALE
RD
A
A
A
A
(TOP View) 18 Lead Plastic DIP
0
1
2
3
0
2
3
4
5
6
7
8
9
MSM62X42BRS
18
17
16
15
14
13
12
11
10
(V
(V
WR
V
CS
D
D
D
D
DD
DD
DD
0
1
2
3
1
)
)
The clock function provides seconds, min-
utes, hours, day of week, date, month, year,
12/24 hour selectable, automatic leap year in
the Christian Era and 30-second compensa-
tion controlled by software. The periodical
interrupt function (or periodical waveform
output) and the STOP/START function of the
clock are also provided. The device is a silicon
gate CMOS and the current consumption is
low. The built-in crystal oscillator is 32.768
kHz and battery backup operation is consid-
ered.
• STOP/START function for clock
• 12/24 hour selectable
• AEL input for 8048 system, 8051 system
• Low current consumption for CMOS
• Low STANDBY voltage and small
• 18-pin plastic DIP(DIP18-P-300)
• 24-pin plastic SOP
or 8085 system (when a microcomputer
does not provide the ALE output, fix the
AEL input at "H".)
device
STANDBY current
STD.P
GND
CS
ALE
NC
NC
NC
RD
A0
NC : NO CONNECTION (unused pins)
A
A
A
1
2
3
0
(TOP View) 24 Lead Plastic SOP
MSM62X42BGS-1K
10
11
12
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
(V
(V
V
CS
WR
NC
NC
NC
D
D
D
D
DD
DD
DD
MSM62X42B
0
1
2
3
1
)
)
41

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msm62x42b Summary of contents

Page 1

... Semiconductor ¡ Semiconductor MSM62X42B REAL TIME CLOCK IC WITH BUILT-IN CRYSTAL DESCRIPTION The MSM62X42B is a bus-connection Micro- computer peripheral Real Time Clock with built-in crystal in the perpetual calendar which can be read and written from a second unit. The interface between this IC and a ...

Page 2

... MSM62X42B RANK M62X42B JAPAN xxxxA Lot no. Stability EXTERNAL DIMENSION 16.3 MAX 1. M62X42B ± A: 10PPM ± B: 50PPM 0.35 13 2.58 MAX 12 ¡ Semiconductor xxxxS Stability 20PPM ± B: 50PPM ± Lot no. (UNIT : mm) 0.3MAX ...

Page 3

... ADJ bit bit are time counter register are control register MSM62X42B 24/12 bit 64Hz 1 sec carry 1 min carry 1 hour carry C F STD.P 43 ...

Page 4

... MSM62X42B REGISTER TABLE Address Register Input Name ...

Page 5

... Conditions Ta = 25° –10 to +70°C (25°C standard) ) –40 to +85°C ( ´´ At 4.5V, let "t" make "0" Ta=25° First year Ta=25° 4.5~5.5V DD MSM62X42B Rating Unit – –55 to +85 °C Rating Unit 4 ...

Page 6

... MSM62X42B D.C. Characteristics Parameter Symbol "H" Input voltage (1) V IH1 "L" Input voltage (1) V IL1 Input leak current (1) I LK1 Input leak current (2) I LK2 "L" output voltage (1) V OL1 "H" output voltage V OH "L" output voltage (2) ...

Page 7

... V V IL1 IL1 IH1 IH1 V V IL1 IL1 4/5 V IH1 IH2 1 0. IL1 IL2 MSM62X42B = 5V ± 10 –40 to +85°C) Min. Max. Unit 1000 — 1000 — 20 — 10 — ns 120 — 100 — 10 — 60 — V IH2 t C1H V IH1 V IL1 ...

Page 8

... MSM62X42B WRITE mode (with use of ALE) Parameter CS Set up Time 1 Address Set up Time Address Hold Time ALE Pulse Width ALE Before WRITE WRITE Pulse Width ALE After WRITE Data Set up Time Data Hold Time CS Hold Time 1 RD/WR Recovery Time V IH2 C1S t AS ...

Page 9

... IH1 V V IL1 IL1 2.2V 4/5 V IH2 0.8V DD IL2 OL MSM62X42B = 5V ± 10 –40 to +85°C) Min. Max. Unit 1000 — 1000 — 20 — — 120 0 — 60 — V IH2 t C1H V IH1 t RCV " Z " 49 ...

Page 10

... MSM62X42B READ mode (with use of ALE) Parameter CS Set up Time 1 Address Set up Time Address Hold Time ALE Pulse Width ALE Before READ ALE After READ RD to Data DATA Hold CS Hold Time 1 RD/WR Recovery Time V IH2 C1S IH1 IL1 ...

Page 11

... ALE during "L". If both WR and RD are set at "L" APPLICATION NOTE”. 1 and STD.P Output N-CH MSM62X42B Bit and ALE at the 0 3 =H, RD outputs the =L, these pins 1 0 needs operation related ...

Page 12

... MSM62X42B ( Both pins are shorted to V pin (SOP). V • These are a positive power supply pin V FUNCTIONAL DESCRIPTION OF REGISTERS Register names These are abbreviations for Second Month , Year , Year and week. These values are in BCD notation Refer to the Register table for details ...

Page 13

... (addresses written, when HOLD bit is always and C is irrespectively performed for the HOLD MSM62X42B Day of Week Sunday Monday Tuesday Wednesday Thursday Friday Saturday to W (addresses and 1 53 ...

Page 14

... MSM62X42B c) IRQ FLAG (D ) (Interrupt Request FLAG) 2 This status bit corresponds to "L" or "OPEN" of the STD.P output pin. When STD.P="L", then this bit=1 and when STD.P=OPEN, then this bit=0. This bit indicates that an interrupt has occurred to a microcomputer mainly. When D0 of register C (MASK)=0, then the STD.P output changes from OPEN to " ...

Page 15

... Duty CYCLE of "L" level when Period INRPT/STND bit is "0". 1/64 second 1 second 1 minute 1 hour and t 1 (EXAMPLE) WHEN and MASK = PM12:00 MSM62X42B ( 1/2 1/128 1/7680 1/460800 occurs at the moment that a carry 2 PM1:00 OPEN LOW LEVEL OPEN LOW LEVEL and t ...

Page 16

... MSM62X42B • The low-level pulse width of the fixed cycle waveform is 7.8125ms independent of t inputs. • The fixed cycle output waveform mode is available for the confirmation of the crystal oscilltor frequency. • During 30 second adjustment a carry can occur that will cause the STD.P output to go " ...

Page 17

... IC, for instance, RAM for backup, exists in battery backup circuit, set a bypass capacitor close to it. Maximum value of allowable power supply noise should be 300mV. Start All registers and STD,P output=undefined ¨ 0 ¨ 1 ¨ *1 ¨ 1 *1=*2(= ¨ 0 ¨ *2 ¨ 0 ¨ 0 MSM62X42B = ...

Page 18

... MSM62X42B Reading and Writing of Registers S Registers (Addresses Reading and writing in the case of using HOLD bit * In the inside of LSI, the CLEAR of BUSY bit is performed when HOLD bit = 0, but, if the period of HOLD bit =0 is extermely narrow as compared with the period of HOLD bit = 1, there is ...

Page 19

... Retried the reading since a carry occurred during the operation. (Note) Do this process within the following time requirements NO by combination between within 1 second = within 1 minute = within 1 hour 1 0 MSM62X42B and ...

Page 20

... MSM62X42B Reading mehtod 3 in the cass of not using HOLD bit t ¨ 1 ¨ ITRPT/STND ¨ MASK ¨ REGISTER C READ D IRQ FLAG=1 YES WAIT t TIME DATA READ IRQ FLAG ¨ 0 END Writing 30-Second ADJ bit (Two Ways A, B) START 30-SECOND ADJ BIT ¨ 1 ...

Page 21

... DD 4~6V 4V 2~4V 2µs (MIN Less than The interface with this IC is available after this matter of fact, regard this matter as the data holding in the stand-by of STATIC RAM. MSM62X42B From Standby Mode 4V 2µs (MIN ...

Page 22

... MSM62X42B Set STD.P at alarm mode Set alarm at 9:00 MASK BIT ITRPT/STND BIT Read Register R 62 ¨ 0 ¨ 1 ¨ Start interruption CPU Activation YES Read H and 10 H Content 9:00? YES CPU HALT or CPU STAND BY ¡ Semiconductor Repeat ...

Page 23

... RL M 100W C B 0.01 4.7µF + µ 1.5¥2=3V Dry cells – Ceramic capacitor Tantalum capacitor GND R1 +5. 4.7µ R2 100 Tantalum capacitor 3.6V (Ni–Cd batteries) – between +5V and MSM62 x 42B, use the DD MSM62X42B MSM62X42B MSM62X42B 0.01µ Ceramic MSM62X42B capacitor GND 63 ...

Page 24

... ALE Note 1) If the address of program memory and the address of MSM62X42B do not overlap, the S and S of the Decoder are not required Note 2) If the address of IO/MSM62X42B for the decoder does not overlap with other addresses, this is not required. ...

Page 25

... Note) It depends upon the switch- 0 ing characteristics decided X’tal used for a Z80 that A 2 either of IORQ and MREQ used ALE ALE RD WR MSM62X42B 65 ...

Page 26

... MSM62X42B REFERENCE DATA (1) Frequency vs. Temperature Temp. (°C) –20 – –10 –20 –30 –40 –50 Typical –60 = 25° –0.035ppm/°C –70 (2) Current Consumption vs. Supply Voltage I DD [µA] CS1 = 25° 2.0 (3) Frequency vs. Supply Voltage ...

Page 27

... However, be sure to confirm the setting conditions sufficiently for the abovementioned reasons.) 4. Please keep parts free from dew. MSM62X42B , open " ...

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