msm62x42b Oki Semiconductor, msm62x42b Datasheet - Page 11

• Manufacturer Part Number: msm62x42b
• Description: Real Time Clock Ic With Built-in Crystal
• Manufacturer: Oki Semiconductor

¡ Semiconductor
PIN DESCRIPTION
D
A
ALE (Address Latch Enable)
WR (WRITE)
RD (READ)
CS
STD • P (STANDRD Pulse)
0
0
Data input/output pins to be directly connected to a microcomputer data bus for reading
and writing of the register controlled by the microcomputer. The interface serves as positive
logic and CS
except these cases.
These are input pins to be directly connected to a microcomputer address bus for register
assignment which is read and written by a microcomputer. These address data are used in
combination with ALE for addressing registers.
This is an input pin to read address data and CS
The address bus andCS
ALE=L in the IC is held. CS
When the microcomputer of MSC-48, 51 or 80 system having an ALE output is used, this pin
is connected to the ALE output of the microcomputer. When 4 Bits of A
microcomputer are commonly used with an another peripheral IC. When the microcom-
puter does not have the ALE output, the ALE input of this IC is fixed to "H".
This is a input pin for which the data is written into this IC by a microcomputer. When
CS1=H, D
rising edge of WR.
This is an input pin to read this IC data by a microcomputer. When CS
register data designated by A
this should be inhibited because it becomes the cause for malfunction.
0
These pins enable/disable ALE, RD and WR operation, when CS
become effective. In other combination except this, the pins become equivalent to ALE=L
and WR=RD=H unconditionally in the IC internal. However, CS
with ALE, while CS
supply voltage detector. Refer to the item, “CS
Output pin of N-CH OPEN DRAIN type. The output data is controlled by the D
content of C
FOR FUNCTIONAL DESCRIPTION OF REGISTERS".
to A
to D
, CS
3
3
1
(Address buses 0 to 3)
(Data buses 0 to 3)
(Chip Select
0
E
~ D
0
=L,
register. This pin has a priority to CS
3
1
data are written into the designated registers by A
=H, RD=L, and as output mode when WR=H. It becomes high impedance
1
0•1
works independently to ALE. CS
0
)
are read into a IC when ALE="H". The address data in the case of
1
0
functions to ALE independently.
to A
3
and ALE during "L". If both WR and RD are set at "L",
V
N-CH
DD
STD.P Output
1
0
0
.
of APPLICATION NOTE”.
and CS
1
1
must be connected to the power
. Refer to the item "CE REGISTER
0
1
=H at CS
needs operation related
0
to A
1
=H, RD outputs the
0
3
MSM62X42B
to A
and ALE at the
0
=L, these pins
3
in a 4 Bit
1
data
51