msm62x42b Oki Semiconductor, msm62x42b Datasheet - Page 18
msm62x42b
Manufacturer Part Number
msm62x42b
Description
Real Time Clock Ic With Built-in Crystal
Manufacturer
Oki Semiconductor
Datasheet
1.MSM62X42B.pdf
(27 pages)
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MSM62X42B
Reading and Writing of Registers S
Registers S
58
1
~ W (Addresses 0 ~ C)
*
In the inside of LSI, the CLEAR of BUSY bit is performed when
HOLD bit = 0, but, if the period of HOLD bit =0 is extermely
narrow as compared with the period of HOLD bit = 1, there is
some case that the CLEAR of BUSY bit delays so that the
BUSY bit can be cleared by sampling HOLD bit = 0 at approximate
16KHz. It is recommended to allow an idling time of 62ms or more.
Reading and writing in the case of using HOLD bit
Write data into or
Read data from
registers S
READ BUSY bit
BUSY bit = 0 ?
1
HOLD bit ¨ 1
HOLD bit ¨ 0
~ W and Writing of 30-Second ADJ Bit
YES
1
~W
NO
HOLD bit ¨ 0
Idling time
¡ Semiconductor
*