mx98743 Macronix International Co., mx98743 Datasheet - Page 21
mx98743
Manufacturer Part Number
mx98743
Description
100 Base Fast Ethernet Management Chip
Manufacturer
Macronix International Co.
Datasheet
1.MX98743.pdf
(43 pages)
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8.3 REPEATER INTERRUPT STATUS REGISTER (RO)
msb
15:8
BIT
15
X
7
6
5
4
3
2
1
0
14
X
Reserved
Reserved
Reserved
NAME
RX
TX
G
D
S
I
13
X
12
X
Indeterminate
Global Interrupt.
1:INT is not active.
0:INT is active.
This bit becomes '1' only if all the interrupt sources are cleared.
Interface Error Interrupt. Set to '1' if interface error with XRC occurs.
Source Address Match Interrupt. The SA of incoming packet matches
a pre-defined 6-byte DA value.
Destination Address Match Interrupt. The DA of incoming packet
matches a pre-defined 6-byte DA value.
Indeterminate
Management Packet Transmitted.
1:Packet transmitted. It is clear after reset.
0:No packet transmitted.
Management Packet Received.
1:Packet received. It is cleared after reset.
Reserved
11
X
10
X
9
X
Table 7-3.
8
X
DESCRIPTION
21
GI
7
IE
6
SA
5
DA
4
X
3
MX98743
TX
2
RX
1
lsb
R/W
X
0
R
R
R
R
R
R
R
R
R
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