ch5001a ETC-unknow, ch5001a Datasheet - Page 10

• Manufacturer Part Number: ch5001a
• Description: Cmos Color Digital Video Camera
• Manufacturer: ETC-unknow

CHRONTEL
10
I
The CH5001 contains a standard I
port is comprised of a two-wire serial interface, pins SD (bidirectional) and SC, which can be connected directly to
the SDB and SCB buses as shown in Figure 4.
The Serial Clock line (SC) is input only and is driven by the output buffer of the master device. The CH5001 acts as
a slave and generation of clock signals on the bus is always the responsibility of the master device. When the bus is
free, both lines are HIGH. The output stages of devices connected to the bus must have an open-drain or open-
collector to perform the wired-AND function. Data on the bus can be transferred up to 400kbit/s according to I
specifications. However, in direct connections to the bus master device, the CH5001 can operate at transfer rates up
to 5 MHz.
Electrical Characteristics for Bus Devices
The electrical specifications of the bus devices’ inputs and outputs and the characteristics of the bus lines connected
to them are shown in Figure 4. A pullup resistor (R
device with input levels related to V
Maximum and minimum values of pullup resistor (R
The value of R
The supply voltage limits the minimum value of resistor R
VOL
The bus capacitance is the total capacitance of wire, connections and pins. This capacitance limits the maximum
value of R
The maximum HIGH level input current of each input/output connection has a specified maximum value of 10 A.
2
C Port Operation
max
• Supply voltage
• Bus capacitance
• Number of devices connected (input current + leakage current = I
SDB (Serial Data Bus)
SCB (Serial Clock Bus)
= 0.4 V for the output stages:
SCLK
OUT
FROM
MASTER
P
due to the specified rise time. The equation for RP is shown below:
P
depends on the following parameters:
BUS MASTER
R
R
DATA IN
MASTER
DATAN2
OUT
MASTER
P
P
>= (V
>= 10
Figure 4: Connection of Devices to the Bus
3
DD
/C (where: R
2
– 0.4) / 3 (R
C control port, through which the control registers can be written and read. This
DD
.
SCLK
IN1
P
is in k and C, the total capacitance, is in pF)
P
in k
SLAVE
SC
P
) must be connected to a 5V ± 10% supply. The CH5001 is a
DATAN2
OUT
DATA
IN1
P
P
)
due to the specified minimum sink current of 3mA at
SD
R
P
input
SCLK
IN2
)
SLAVE
+VDD
201-0000-032 Rev 3.0, 6/2/99
DATAN2
OUT
DATA
IN2
CH5001A
2
C