ch5001a ETC-unknow, ch5001a Datasheet - Page 16

• Manufacturer Part Number: ch5001a
• Description: Cmos Color Digital Video Camera
• Manufacturer: ETC-unknow

CHRONTEL
16
Table 5. Register Descriptions
Cr Gain
Cb Gain
PSH Gain
Gamma
Clamp Level
Miscellaneous
Device ID
Test Register
Test Memory
Auto-Shutter Enable
Auto-Shutter Window and
Input Control Bits
Auto-Shutter Black Count
Threshold Value
Auto-Shutter White Count
Threshold Value
Extended Shutter Bits
Miscellaneous 2
Miscellaneous 3
Power Down Register
Address Register
Register
Symbol
CRG
CBG
PSHG
BCLMP
MISC
DID
TST
TM
ASE
ASW
ASBC
ASWC
ESLE
MISC2
MISC3
PD
AR
Address
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
26
(Hex)
Default
1011
1010
1001
0011
0001
1001
1000
0000
1000
1000
0010
0000
0000
0000
0000
0000
1110
0100
x100
PUD[3:0]
1111
1001
1000
0000
xxx0
0000
0001
1001
0011
1001
xxx1
0000
0000
0000
Value
Gain applied to the Cr color difference signal.
Gain applied to the Cb color difference signal.
0-2: Selects the gain of the programmable
sample and hold.
4,5: Selects Gamma correction value
Selects the level that the black level clamp
adjusts to during dark pixel.
7,6,5: Reserved
4: Power Down
3: V Sync. Polarity
2: H Sync. Polarity
1,0: Border Color
The four MSBs hold the device ID. The four
LSBs hold the version ID.
Test Register
Test Register
Enables and controls the following autoshutter
algorithm parameters:
7: Enables the AS to control the shutter
6: Enables the AS to control black level
5: Enables the AS to control programmable
gain.
4,3: Reserved
2-0: Determines the threshold of the shutter
gain setting to enable black level changes.
Used to select the autoshutter window, display
window, and select input data to algorithm:
6: Autoshutter max input enable
5: Autoshutter A/D or CSC select
4: Window Display
3-0: Window Select
Determines the threshold that compares the
Black Sense value.
Determines the threshold that compares the
White Sense value.
ESLE (MSB) along with ESLH and ESLL form
the overall Shutter Length Control Register.
Determines Master clock frequency, CLKOUT
control, and A/D Direct Output mode
Determines internal clock delay and A/D full
scale value
4: ResetB provides software reset
3-0: Reserved.
Holds the address of the IIC register being
accessed
Description
201-0000-032 Rev 3.0, 6/2/99
CH5001A