ch5001a ETC-unknow, ch5001a Datasheet - Page 32
ch5001a
Manufacturer Part Number
ch5001a
Description
Cmos Color Digital Video Camera
Manufacturer
ETC-unknow
Datasheet
1.CH5001A.pdf
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CHRONTEL
Note: The output pixel Cb0 will be delayed by 2 times the value of the HStart register CLKOUT cycles, if HStart is
non-zero.
32
VS*
CLKOUT
Y[7:0]
Table 16. Digital Inputs/Outputs
Table 17. Timing Characteristics
HS*
CRS
Symbol
Voh
Vol
Vih
Vil
Ilk
t
t
t
t
t
t
t
t
Symbol
VSW
HSW
HD
P
PH
PH
SP
HP
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input leakage current
Vertical sync pulse width
Horizontal sync pulse width
Horizontal and vertical sync delay from clock
CLKOUT period (varies with mode and output format)
CLKOUT high time
CLKOUT low time
CLKOUT to pixel data setup time
CLKOUT to pixel data hold time
Description
t
HD
Figure 12: Timing Diagram (M[2:0] = 1, OF = 1, H Start = 0)
t
Cb0
HSW
Description
t
VSW
Ioh =.400 mA
Iol = 3.2 mA
Test Condition @TA=
Y0
25 C
t
SP
t
P
Cr0
2.8
3.4
GND
-10
t
hP
2
37
14.8
14.8
2
2
Min
Min
t
2
64
Ph
Typ
Typ
201-0000-032 Rev 3.0, 6/2/99
Y1
0.4
V
0.8
10
10
148.2
89
89
t
PL
DD
Max
Max
CH5001A
Lines
MCLK
nS
nS
nS
nS
ns
ns
Unit
Unit
V
V
V
V
Cb2
A
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