CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 24

• Manufacturer Part Number: CS42428
• Description: 114 dB, 192kHz 8-Ch CODEC WITH PLL
• Manufacturer: CIRRUS [Cirrus Logic]

3.5.4.3
This configuration will support up to 8 channels of DAC data, and 6 channels of ADC data. OLM Config
#3 will handle up to 20-bit ADC samples at an Fs of 48 kHz and 24-bit DAC samples at an Fs of 48 kHz.
Since the ADCs data stream is configured to use the ADC_SDOUT output and the internal and external
ADCs are clocked from the ADC_SP, then the sample rate for the DAC Serial Port can be different from
the sample rate of the ADC serial port.
24
Functional Mode Register (addr = 03h)
Interface Format Register (addr = 04h)
Misc. Control Register (addr = 05h)
ADC Mode
Set DAC_FMx = 00,01,10
Set ADC_FMx = 00,01,10
Set ADC_CLK_SEL = 1
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01
Set DAC_OLx bits = 00,01,10
Set DAC_SP M/S = 1
Set ADC_SP M/S = 0 or 1
Set EXT ADC SCLK = 0
OLM Config #3
Register / Bit Settings
Not One
Line Mode
One Line
Mode #1
One Line
Mode #2
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM/QSM
ADC_SCLK=64Fs
ADC_LRCK=SSM/DSM/QSM
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM/QSM
ADC_SCLK=128Fs
ADC_LRCK=SSM
CS5361
Not One Line Mode
CS5361
not valid
SDO UT1
SDO UT2
LR CK
SCLK
MC LK
Figure 15. OLM Configuration #3
RMCK
AD CIN1
AD CIN2
CS42428
DAC_LRCK can run at SSM, DSM, or QSM independent of ADC_LRCK
ADC_LRCK can run at SSM, DSM, or QSM independent of DAC_LRCK
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=SSM/DSM/QSM
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=128Fs
ADC_LRCK=SSM
ADC_SDO UT
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
DAC_SDIN1
DAC_SDIN2
DAC_SDIN3
DAC_SDIN4
D AC_LRCK
DAC _SCLK
ADC_SCLK
AD C_LRCK
Configure ADC_SDOUT to be clocked from the ADC_SP clocks.
Select the digital interface format when not in one line mode
One Line Mode #1
Identify external ADC clock source as ADC Serial Port.
not valid
Set ADC Serial Port to master mode or slave mode.
64Fs,128Fs,256Fs
DAC Mode
Set DAC Serial Port to master mode.
64Fs,128Fs
S DIN _PO RT1
SC LK_POR T1
LRC K_PO RT2
SDO UT1_P ORT2
SDO UT2_P ORT2
SDO UT3_P ORT2
SDO UT4_P ORT2
MCLK
LRC K_PO RT1
SC LK_POR T2
DIGITAL AUD IO
PROCESSOR
Description
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=SSM/DSM/QSM
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=128Fs
ADC_LRCK=SSM
One Line Mode #2
not valid
CS42428