CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 35

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CS42428

Manufacturer Part Number
CS42428
Description
114 dB, 192kHz 8-Ch CODEC WITH PLL
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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5.5.2
5.5.3
5.5.4
ADC_OL1
DAC_OL1
ADC ONE_LINE MODE (ADC_OLX)
DAC ONE_LINE MODE (DAC_OLX)
CODEC RIGHT JUSTIFIED BITS (CODEC_RJ16)
DIF1
Default = 00
Function:
Default = 00
Function:
Default = 0
Function:
0
0
1
1
0
0
1
1
0
0
1
1
These bits select which mode the ADC will use. By default one-line mode is disabled but can be se-
lected using these bits. Please see Figures 10 and 11 to see the format of one-line mode 1 and
one-line mode 2.
These bits select which mode the DAC will use. By default one-line mode is disabled but can be se-
lected using these bits. Please see Figures 10 and 11 to see the format of one-line mode 1 and
one-line mode 2.
This bit determines how many bits to use during right justified mode for the DAC and ADC. By default
the DAC and ADC will be in RJ24 bits but can be set to RJ16 bits.
0 - 24 bit mode.
1 - 16 bit mode.
ADC_OL2
DAC_OL2
DIF0
0
1
0
1
0
1
0
1
0
1
0
1
Left Justified, up to 24-bit data
I
Right Justified, 16-bit or 24-bit data
reserved
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
reserved
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
reserved
2
S, up to 24-bit data
Table 7. Digital Interface Formats
Table 8. ADC One_Line Mode
Table 9. DAC One_Line Mode
Description
Description
Description
Format
Format
Format
0
1
2
3
4
3
4
-
-
-
-
-
CS42428
Figure
Figure
Figure
10
10
11
11
9
8
7
-
-
-
-
-
35

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