RM5261A-300-HI PMC [PMC-Sierra, Inc], RM5261A-300-HI Datasheet - Page 29

• Manufacturer Part Number: RM5261A-300-HI
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002240, Issue 2
Table 9 Initialization Interface
Table 10 Power Supply
Note:
1.
BigEndian
VccOK
ColdReset*
Reset*
ModeClock
ModeIn
VccInt
VccIO
Vss
Pin Name
An ‘*’ at the end of the signal name denotes active low.
Pin Name
Type
Input
Input
Input
Input
Output
Input
Input
Input
Input
Type
Description
Allows the system to change the processor addressing mode without
rewriting the mode ROM.
Vcc is OK
When asserted, this signal indicates to the RM5261A that both power
supplies has been above the recommended value for more than 100
milliseconds and will remain stable. The assertion of VccOK initiates
the reading of the boot-time mode control serial stream.
Cold reset
This signal must be asserted for a power on reset or a cold reset.
ColdReset must be de-asserted synchronously with SysClock.
Reset
This signal must be asserted for any reset sequence. It may be
asserted synchronously or asynchronously for a cold reset, or
synchronously to initiate a warm reset. Reset must be de-asserted
synchronously with SysClock.
Boot mode clock
Serial boot-mode data clock output at the system clock frequency
divided by 256.
Boot mode data in
Serial boot-mode data input.
Power supply for core.
Power supply for I/O.
Ground return.
RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet
Description
Preliminary
29