W83194R-67B Winbond, W83194R-67B Datasheet - Page 7

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W83194R-67B

Manufacturer Part Number
W83194R-67B
Description
100MHZ 3-DIMM CLOCK FOR VIA MVP4
Manufacturer
Winbond
Datasheet
Bytes sequence order for I
Set R/W to 1 when read back the data sequence is as follows :
8 . 3 S E R I A L C O N T R O L R E G I S T E R S
The Pin column lists the affected pin number and the @PowerUp column gives the default state at
true power up.
acknowledge of the Address Byte. Although the data (bits) in these two bytes are considered "don't
care", they must be sent and will be acknowledge.
(Register 0, Register 1, Register 2, ....) will be valid and acknowledged.
8.3.1 Register 0: CPU Frequency Select Register (default = 0)
Bit
Clock Address
A(6:0) & R/W
Clock Address
A(6:0) & R/W
7
6
5
4
3
2
1
0
@ P o w e r U p
0
0
0
0
0
0
0
0
"Command Code" byte and "Byte Count"
Ack
Ack
2
C controller :
8 bits dummy
Command code
Pin
-
-
-
-
-
-
-
-
Byte 0
0 = ±0.25% Center type Spread Spectrum Modulation
1 = ±0.5% Center type Spread Spectrum Modulation
SSEL2 (for frequency table selection by software via I
SSEL1 (for frequency table selection by software via I
SSEL0 (for frequency table selection by software via I
0 = Selection by hardware
1 = Selection by software I
SSEL3 (for frequency table selection by software via I
0 = Normal
1 = Spread Spectrum enabled
0 = Running
1 = Tristate all outputs
Ack
Ack
- 7 -
8 bits dummy
Byte count
Byte 1
After that, the below described sequence
Description
2
C - Bit 2, 6:4
byte must be sent following the
Publication Release Date: Dec.. 1999
Ack
Ack
W83194R-67B
Byte0,1,2...
until Stop
Byte2, 3, 4...
until Stop
PRELIMINARY
Revision 0.50
2
2
2
2
C)
C)
C)
C)

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