W83194R-67B Winbond, W83194R-67B Datasheet - Page 8

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W83194R-67B

Manufacturer Part Number
W83194R-67B
Description
100MHZ 3-DIMM CLOCK FOR VIA MVP4
Manufacturer
Winbond
Datasheet
S S E L 3
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Frequency table by I2C
8.3.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)
Bit
6
7
5
4
3
2
1
0
@ P o w e r U p
S S E L 2
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
x
1
1
1
1
1
1
1
S S E L 1
1
1
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
Pin
42
43
45
46
-
-
-
-
Latched FS2#
0 = 0.5% down type spread, overrides Byte0 -bit7.
1= Center type spread.
Reserved
Reserved
CPUCLK2 (Active / Inactive)
CPUCLK1 (Active / Inactive)
CPUCLK0 (Active / Inactive)
CPUCLK_F (Active / Inactive)
S S E L 0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
C P U , S D R A
M(MHz)
60
66.8
70
90
97.0
80
83.3
95.25
100.2
75
80
83.3
105
110
115
1 2 4
1 3 3
- 8 -
PCI(MHz)
30(CPU/2)
33.4(CPU/2)
35(CPU/2)
30(CPU/3)
32.33(CPU/3)
26.67(CPU/3)
27.77(CPU/3)
31.75(CPU/3)
33.3(CPU/3)
37.5(CPU/2)
40(CPU/2)
41.65(CPU/2)
35(CPU/3)
36.67(CPU/3)
38.33(CPU/3)
31(CPU/4)
33.3(CPU/4)
Description
Publication Release Date: Dec.. 1999
W83194R-67B
REF,IOAPIC (MHz)
PRELIMINARY
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
Revision 0.50

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