W83194R-67B Winbond, W83194R-67B Datasheet - Page 9

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W83194R-67B

Manufacturer Part Number
W83194R-67B
Description
100MHZ 3-DIMM CLOCK FOR VIA MVP4
Manufacturer
Winbond
Datasheet
8.3.3 Register 2: PCI Clock Register (1 = Active, 0 = Inactive)
8.3.4 Register 3: SDRAM Clock Register (1 = Active, 0 = Inactive)
8.3.5 Register 4: Reserved Register (1 = Active, 0 = Inactive)
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@ P o w e r U p
@ P o w e r U p
@ P o w e r U p
1
1
1
1
1
1
1
1
1
x
1
1
1
1
1
1
1
1
1
1
x
1
x
1
21,20,18,17
32,31,29,28
38,37,35,34
Pin
Pin
13
12
11
10
7
8
-
-
-
-
-
-
-
-
-
-
Pin
26
25
39
-
-
Reserved
PCICLK_F (Active / Inactive)
Reserved
PCICLK4 (Active / Inactive)
PCICLK3 (Active / Inactive)
PCICLK2 (Active / Inactive)
PCICLk1 (Active / Inactive)
PCICLK0 (Active / Inactive)
Reserved
Reserved
Reserved
Reserved
Latched FS1#
Reserved
Latched FS3#
Reserved
Reserved
Latched FS0#
48MHz (Active / Inactive)
24MHz (Active / Inactive)
SDRAM_F(Active / Inactive)
SDRAM(8:11) (Active / Inactive)
SDRAM(4:7) (Active / Inactive)
SDRAM(0:3) (Active / Inactive)
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Description
Description
Description
Publication Release Date: Dec.. 1999
W83194R-67B
PRELIMINARY
Revision 0.50

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