MM908E624ACDWB/R Motorola, MM908E624ACDWB/R Datasheet - Page 25

• Manufacturer Part Number: MM908E624ACDWB/R
• Description: TRIPLE HIGH-SIDE SWITCH WITH EMBEDDED MCU AND LIN
• Manufacturer: Motorola

908E624 SPI INTERFACE AND CONFIGURATION
link between the microcontroller and the analog die of the
908E624.
transfer is prepared.
transfer and puts the MISO in the low-impedance state and
latches the analog status data (Register read data).
moved to MISO/MOSI terminals. With the falling edge of the
SPI clock SPSCK the data is sampled by the Receiver.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The serial peripheral interface creates the communication
During the inactive phase of the
The falling edge of the
With the rising edge of the SPI clock, SPSCK the data is
SPSCK
MOSI
MISO
SS
Change MISO/MOSI Output
Read data latch
Rising edge of SPSCK
SS
indicates the start of a new data
SS
(High), the new data
LOGIC COMMANDS AND REGISTERS
D7
D7
Falling edge of SPSCK
Sample MISO/MOSI Input
D6
D6
Figure 15. SPI Protocol
D5
D5
Register write data
Register read data
D4
D4
The master sends 8 bits of control information and the slave
replies with 8 bits of status data.
edges are present in the active (low) phase of
the transfer and latches the write data (MOSI) into the
register The
state.
The interface consists of four terminals (see
•
• MOSI—Master-Out Slave-In
• MISO—Master-In Slave-Out
• SPSCK—Serial Clock
A complete data transfer via the SPI consists of 1 byte.
The data transfer is only valid if exactly 8 sample clock
The rising edge of the slave select
D3
D3
SS
—Slave Select
D2
D2
SS
D1
D1
high forces MISO to the high impedance
D0
D0
Write data latch
Functional Device Operation
SS
Functional Description
indicates the end of
SS
Figure
.
908E624
15):
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