MM908E625ACDWB/R2 Motorola, MM908E625ACDWB/R2 Datasheet - Page 19

• Manufacturer Part Number: MM908E625ACDWB/R2
• Description: Integrated Quad Half H-Bridge with Power Supply / Embedded MCU / and LIN Serial Communication
• Manufacturer: Motorola

LVF—Low-Voltage Flag Bit
LVF by writing a logic [1] to LVF. If a low-voltage condition is still
present while writing a logic [1] to LVF, the writing has no effect.
Therefore, a low-voltage interrupt cannot be lost due to
inadvertent clearing of LVF. Reset clears the LVF bit. Writing a
logic [0] to LVF has no effect.
HVF—High-Voltage Flag Bit
HVF by writing a logic [1] to HVF. If high-voltage condition is still
present while writing a logic [1] to HVF, the writing has no effect.
Therefore, a high-voltage interrupt cannot be lost due to
inadvertent clearing of HVF. Reset clears the HVF bit. Writing a
logic [0] to HVF has no effect.
OCF—Overcurrent Flag Bit
clears the OCF bit. To clear this flag, write a logic [1] to the
appropriate overcurrent flag in the SYSSTAT Register. See
Figure
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
This read/write flag is set on a low-voltage condition. Clear
• 1 = Low-voltage condition has occurred.
• 0 = Low-voltage condition has not occurred.
This read/write flag is set on a high-voltage condition. Clear
• 1 = High-voltage condition has occurred.
• 0 = High-voltage condition has not occurred.
This read-only flag is set on an overcurrent condition. Reset
• 1 = High-current condition has occurred.
• 0 = High-current condition has not occurred.
7, which shows the three signals triggering the OCF.
Figure 7. Principal Implementation for OCF
HVDD_OCF
HS_OCF
HB_OCF
Freescale Semiconductor, Inc.
For More Information On This Product,
OCF
Go to: www.freescale.com
Interrupt Mask Register (IMR)
HPIE—Hall-Effect Sensor Input Terminal Interrupt Enable
Bit
sensor input terminal flag, HPF. Reset clears the HPIE bit.
LINIE—LIN Line Interrupt Enable Bit
LINF. Reset clears the LINIE bit.
HTIE—High-Temperature Interrupt Enable Bit
temperature flag, HTF. Reset clears the HTIE bit.
LVIE—Low-Voltage Interrupt Enable Bit
voltage flag, LVF. Reset clears the LVIE bit.
HVIE—High-Voltage Interrupt Enable Bit
voltage flag, HVF. Reset clears the HVIE bit.
OCIE—Overcurrent Interrupt Enable Bit
flag, OCF. Reset clears the OCIE bit.
Reset
Read
Write
This read/write bit enables CPU interrupts by the Hall-effect
• 1 = Interrupt requests from HPF flag enabled.
• 0 = Interrupt requests from HPF flag disabled.
This read/write bit enables CPU interrupts by the LIN flag,
• 1 = Interrupt requests from LINF flag enabled.
• 0 = Interrupt requests from LINF flag disabled.
This read/ write bit enables CPU interrupts by the high-
• 1 = Interrupt requests from HTF flag enabled.
• 0 = Interrupt requests from HTF flag disabled.
This read/write bit enables CPU interrupts by the low-
• 1 = Interrupt requests from LVF flag enabled.
• 0 = Interrupt requests from LVF flag disabled.
This read/write bit enables CPU interrupts by the high-
• 1 = Interrupt requests from HVF flag enabled.
• 0 = Interrupt requests from HVF flag disabled.
This read/write bit enables CPU interrupts by the overcurrent
• 1 = Interrupt requests from OCF flag enabled.
• 0 = Interrupt requests from OCF flag disabled.
Bit7
0
0
Register Name and Address: IMR - $04
HPIE
6
0
LINIE
5
0
HTIE
4
0
LVIE
3
0
HVIE
2
0
OCIE
1
0
908E625
Bit0
0
0
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