MAX5037 MAXIM [Maxim Integrated Products], MAX5037 Datasheet - Page 17

• Manufacturer Part Number: MAX5037
• Description: VRM 9.0, Dual-Phase, Parallelable, Average Current-Mode Controller
• Manufacturer: MAXIM [Maxim Integrated Products]

The VEA sets the gain of the voltage control loop. The
VEA determines the error between the differential
amplifier output and the reference voltage generated
from the DAC.
The VEA output clamps to 0.9V relative to V
thus limiting the average maximum current from individ-
ual phases. The maximum average current-limit thresh-
old for each phase is equal to the maximum clamp
voltage of the VEA divided by the gain (18) of the cur-
rent-sense amplifier. This results in accurate settings
for the average maximum current for each phase. Set
the VEA gain using R
voltage positioning required within the rated current
range as discussed in the Adaptive Voltage Positioning
section (Figure 3).
Powering new generation processors requires new
techniques to reduce cost, size, and power dissipation.
Voltage positioning reduces the total number of output
capacitors to meet a given transient response require-
ment. Setting the no-load output voltage slightly higher
than the output voltage during nominally loaded condi-
tions allows a larger downward voltage excursion when
the output current suddenly increases. Regulating at a
lower output voltage under a heavy load allows a larger
upward voltage excursion when the output current sud-
denly decreases. A larger allowed voltage step excur-
sion reduces the required number of output capacitors
or allows for the use of higher ESR capacitors.
Voltage positioning and the ability to operate with the mul-
tiple reference voltages may require the output to regulate
away from a center value. Define the center value as the
voltage where the output equals the VID reference volt-
age at one half the maximum output current (Figure 5).
Figure 5. Defining the Voltage-Positioning Window
V
V
CNTR
CNTR
+ ∆V
- ∆V
V
OUT
OUT
CNTR
/2
/2
NO LOAD
Adaptive Voltage Positioning
______________________________________________________________________________________
F
and R
1/2 LOAD
LOAD (A)
IN
Voltage-Error Amplifier
for the amount of output
VRM 9.0, Dual-Phase, Parallelable,
Average Current-Mode Controller
FULL LOAD
CM
(0.6V),
Set the voltage-positioning window (∆V
resistive feedback of the VEA. See the Adaptive
Voltage-Positioning Design Procedure section and use
the following equation to calculate the voltage-position-
ing window:
where R
the VEA, G
rent-sense resistor or, if using lossless inductor current
sensing, the DC resistance of the inductor.
The voltage at CNTR (V
6). The current set by the resistor R
the inverting input of the VEA, centering the output volt-
age-positioning window on the VID programmed output
voltage. Set the center of the output voltage with a
resistor from CNTR to SGND in the following manner:
where V
corresponding I
load to full load.
Figure 6. Adaptive Voltage-Positioning Circuit
CNTR
REG
+1.2V
IN
OUT
R
CNTR
∆V
and R
C
DAC_OUT
OUT
is a required value of output voltage at the
is the current-loop gain, and R
=
F
OUT
= I
I
are the input and feedback resistors of
OUT
G
OUT
. I
C



=
OUT
2
CNTR
x R
R G
0 05
R
R
V
.
F C
IN
S
CNTR
IN
can be any value from no
) regulates to 1.2V (Figure
1X
/ (2 x G

 +

V
1X
×
CC
(
R
V
OUT
IN
CNTR
C
x R
OUT
−
VID
is mirrored at
V
F
S
CC
) using the
)
)
is the cur-
1X
1X
EAN
(3)
(4)
(5)
17