MAX5037 MAXIM [Maxim Integrated Products], MAX5037 Datasheet - Page 24

• Manufacturer Part Number: MAX5037
• Description: VRM 9.0, Dual-Phase, Parallelable, Average Current-Mode Controller
• Manufacturer: MAXIM [Maxim Integrated Products]

Selecting the number of phases for a voltage regulator
depends mainly on the ratio of input-to-output voltage
(operating duty cycle). Optimum output-ripple cancella-
tion depends on the right combination of operating duty
cycle and the number of phases. Use the following
equation as a starting point to choose the number of
phases:
where K = 1, 2, or 3 and the duty cycle D = V
Choose K to make N
ple, converting V
ter ripple cancellation in the six-phase converter than in
the four-phase converter. Ensure that the output load
justifies the greater number of components for multi-
phase conversion. Generally, limiting the maximum out-
put current to 25A per phase yields the most cost-
effective solution. The maximum ripple cancellation
occurs when N
Single-phase conversion requires greater size and power
dissipation for external components such as the switch-
ing MOSFETs and the inductor. Multiphase conversion
eliminates the heatsink by distributing the power dissipa-
tion in the external components. The multiple phases
operating at given phase shifts effectively increase the
switching frequency seen by the input/output capacitors,
reducing the input/output capacitance requirement for
the same ripple performance. The lower inductance value
improves the large-signal response of the converter dur-
ing a transient load at the output. Consider all these
issues when determining the number of phases neces-
sary for the voltage regulator application.
VRM 9.0, Dual-Phase, Parallelable,
Average Current-Mode Controller
Table 3. Component Suppliers
24
Murata
ON Semiconductor
Panasonic
TDK
Vishay-Siliconix
______________________________________________________________________________________
SUPPLIER
PH
IN
= K/D.
= +12V to V
PH
N
PH
an integer number. For exam-
≈ K/D
OUT
Number of Phases
1-800-551-6933
= +1.75V yields bet-
770-436-1300
602-244-6600
714-373-7939
847-803-6100
PHONE
OUT
/V
IN.
(7)
770-436-3030
602-244-3345
714-373-7183
847-390-4405
619-474-8920
The following steps outline the procedure for setting the
adaptive voltage positioning:
1) Choose the voltage-error amplifier input (EAN)
2) Determine a reasonable amount of excursion from
3) Calculate R
4) Calculate the centering resistor, R
5) Choose the regulation resistor, R
The switching frequency per phase, peak-to-peak rip-
ple current in each phase, and allowable ripple at the
output determine the inductance value.
Selecting higher switching frequencies reduces the
inductance requirement, but at the cost of lower efficien-
cy. The charge/discharge cycle of the gate and drain
capacitances in the switching MOSFETs create switching
losses. The situation worsens at higher input voltages,
since switching losses are proportional to the square of
input voltage. Use 500kHz per phase for V
250kHz or less per phase for V
FAX
resistor R
the desired output voltage that the system can tol-
erate and use as an estimate for the voltage-posi-
tioning window, ∆V
Equation 3 to verify that ∆V
ble limits.
Equation 5. R
voltage positioning such that at 1/2 full-load current,
the output voltage is the desired VID programmed
output voltage (Figure 5). Do not use values less
than 24kΩ for R
same value as the feedback resistor, R
R
ing window at all VID output voltage settings. Do
not use values less than 37kΩ for R
F
). R
Adaptive Voltage-Positioning Design
REG
IN
maintains the adaptive voltage-position-
> 5kΩ.
www.murata.com
www.on-semi.com
www.panasonic.com
www.tcs.tdk.com
www.vishay.com
F
CNTR
from equations 22 and 23. Use
CNTR
OUT
sets the center of the adaptive
.
(see Figures 5 and 7).
IN
OUT
Inductor Selection
WEBSITE
> +12V.
remains within tolera-
REG
REG
, to have the
Procedure
.
CNTR
F
IN
(R
= +5V,
, from
REG
=