PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 10

• Manufacturer Part Number: PCA9665D
• Description: Fm+ parallel bus to I2C-bus controller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA9665_3
Product data sheet
Table 12.
Bit
7
6
Symbol Description
AA
ENSIO
I2CCON - Control register (A1 = 1, A0 = 1) bit description
The Assert Acknowledge flag.
AA = 1: If the AA flag is set, an acknowledge (LOW level on SDA) will be returned
during the acknowledge clock pulse on the SCL line when:
AA = 0: if the AA flag is reset, a not acknowledge (HIGH level on SDA) will be
returned during the acknowledge clock pulse on SCL when:
When the bus controller is in the addressed Slave Transmitter mode, state C8h
will be entered after the last data byte is transmitted and an ACK is received from
the Master Receiver (see
PCA9665 enters the not addressed Slave Receiver mode, and the SDA line
remains at a HIGH level. In state C8h, the AA flag can be set again for future
address recognition.
When the PCA9665 is in the not addressed slave mode, its own slave address is
ignored. Consequently, no acknowledge is returned, and a serial interrupt is not
requested. Thus, the bus controller can be temporarily released from the I
while the bus status is monitored. While the bus controller is released from the
bus, START and STOP conditions are detected, and serial data is shifted in.
Address recognition can be resumed at any time by setting the AA flag.
The bus controller enable bit.
ENSIO = 0: When ENSIO is ‘0’, the SDA and SCL outputs are in a
high-impedance state. SDA and SCL input signals are ignored, the PCA9665 is in
the ‘not addressed’ slave state. Internal oscillator is off.
ENSIO = 1: When ENSIO is ‘1’, the PCA9665 is enabled.
After the ENSIO bit is set to ‘1’, it takes 550 s enable time for the internal
oscillator to start up and the serial interface to initialize. The PCA9665 will enter
either the master or the slave mode after this time. ENSIO should not be used to
temporarily release the PCA9665 from the I
the I
the AA flag above).
In the following text, it is assumed that ENSIO = ‘1’ for Normal mode operation.
For power-up behavior, please refer to
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‘Own slave address’ has been received (as defined in I2CADR register).
A data byte has been received while the bus controller is in the Master
Receiver mode.
A data byte has been received while the bus controller is in the addressed
Slave Receiver mode.
‘Own slave address’ has been received (as defined in I2CADR register).
A data byte has been received while the PCA9665 is in the Master Receiver
mode.
A data byte has been received while the PCA9665 is in the addressed Slave
Receiver mode.
2
C-bus status is lost. The AA flag should be used instead (see description of
Rev. 03 — 12 August 2008
Figure 10
and
Fm+ parallel bus to I
Section 8.10 “Power-on
Figure
2
C-bus since, when ENSIO is reset,
14). When SI is cleared, the
PCA9665
© NXP B.V. 2008. All rights reserved.
2
reset”.
C-bus controller
2
C-bus
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