DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 34

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DAC1408D650HW/C1

Manufacturer Part Number
DAC1408D650HW/C1
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
DAC1408D650_1
Objective data sheet
10.13.3 AC interface to an Analog Quadrature Modulator (AQM)
10.14 Power and grounding
When the AQM common mode voltage is close to ground, the DAC1408D650 must be
AC-coupled and the auxiliary DACs are needed for offset correction.
Figure 20
input level when using auxiliary DACs.
In order to obtain optimum performance, it is recommended that the 1.8 V analog power
supplies on pins 5, 11, 71, 77 and 99 should not be connected with the ones on pins 6, 70,
79, 81, 83, 93, 95 and 97 on the top layer.
To optimize the decoupling, the power supplies should be decoupled with the following
ground pins:
Fig 21. An example of an AC interface to a 0.5 V
V
V
V
pins 79, 81, 83 with 80, 82, 84; pins 93, 95, 97 with 92, 94, 96 and pin 99 with 98.
V
V
pin 44.
DDD(1V8)
DD(IO)(3V3)
DDA(1V8)
DDA(3V3)
DDA(sintf)(1V8)
provides an example of a connection to an AQM with a 0.5 V
: pin 5 with 4; pin 6 with pin 7; pin 11 with 10; pin 71 with 72; pin 77 with 78;
: pin 1 with 100 and pin 75 with 76.
: pin 18 with 19 and pin 55 with 54.
: pin 14 with 15 and pin 60 with 61.
: pin 26 with 29; pin 32 with pin 35 and pin 38; pin 41 with pin 38 and
IOUTN
IOUTP
AUXP
AUXN
Rev. 01 — 26 May 2009
IOUTP/IOUTN
V
V
0 mA to 20 mA
1.1 mA (typ.)
o(cm)
o(dif)(p-p)
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
66.5
= 2.65 V
3.3 V
= 1.96 V
66.5
10 nF
10 nF
BBP/BBN
V
V
offset correction up to 70 mV
i(cm)
i(dif)(p-p)
= 0.5 V
i(cm)
2 k
174
34
= 1.96 V
5 V
AQM when using auxiliary DACs
2 k
174
34
DAC1408D650
BBP
BBN
AQM (V
i(cm)
i(cm)
© NXP B.V. 2009. All rights reserved.
001aaj589
= 0.5 V)
common mode
34 of 88

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