DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 50

• Manufacturer Part Number: DAC1408D650HW/C1
• Manufacturer: NXP [NXP Semiconductors]

Table 65.
Address Register name
0
1
2
3
4
5
6
7
8
9
10 0Ah MAN_ALIGN_
11 0Bh FA_ERR_
12 0Ch SYNCOUT_
13 0Dh LANE_
14 OEh LANE_SELECT
16 10h SOFT_RESET_
17 11h INIT_SCR_S15T8
00h SR_DLP_0
01h SR_DLP_1
02h FORCE_LOCK
03h MAN_LOCK_
04h MAN_LOCK_2_0 R/W
05h CA_CNTRL
06h SCR-CNTRL
07h ILA_CNTRL
08h FORCE_ALIGN
09h MAN_ALIGN_
LN_1_0
LN_0_1
LN_1_2
HANDLING
MODE
POLARITY
SCRAMBLER
_LN0
10.15.2.5 Page 4 allocation map description
Page 4 register allocation map
R/W Bit definition
R/W SR_SWA_
R/W SR_CNTRL
R/W
R/W
R/W
R/W MAN_SCR
R/W
R/W
R/W
R/W
R/W SEL_KOUT_UNEXP_LN
R/W
R/W
R/W
R/W
R/W
b7
SWAP_LN3
LOCK_LN3
SEL_421_
FORCE_
WORD_
LANE_SEL_LN3[1:0]
_LN3
_LN3
LN3
211
-
-
-
SEL_RE_INIT[2:0]
23
b6
MAN_SCR_
SR_CNTRL
SWAP_LN2
LOCK_LN2
SR_SWA_
FORCE_
WORD_
MAN_ALIGN_LN1[3:0]
MAN_ALIGN_LN3[3:0]
MAN_LOCK_LN1[3:0]
MAN_LOCK_LN3[3:0]
_LN2
LN2
LN2
-
-
-
SEL_ILA[1:0]
b5
SR_CNTRL_
MAN_SCR_
SEL_KOUT_UNEXP_LN1
LOCK_LN1
SWAP_LN1
SR_SWA_
FORCE_
WORD_
LANE_SEL_LN2[1:0]
LN1
LN1
LN1
-
-
-
INIT_VALUE_S15_S8_LN0[7:0]
0
b4
SR_CNTRL_
MAN_SCR_
SWAP_LN0
SYNC_POL
LOCK_LN0
SR_SWA_
FORCE_
WORD_
LN0
LN0
LN0
-
-
-
SEL_LOCK[2:0]
b3
SR_DEC_LN
SR_SCR_LN
SR_CA_LN3 SR_CA_LN2 SR_CA_LN1 SR_CA_LN0 00000000 00h
SELECT_RF
_F10_LN3
SRC_LN3
POL_LN3
FORCE_
SEL_NIT_ERR_LN23
LANE_SEL_LN1[1:0]
3
3
-
-
b2
SR_DEC_LN
SELECT_RF
SR_SCR_LN
_F10_LN2
SRC_LN2
POL_LN2
FORCE_
MAN_ALIGN_LN0[3:0]
MAN_ALIGN_LN2[3:0]
MAN_LOCK_LN0[3:0]
MAN_LOCK_LN2[3:0]
SEL_SYNC[3:0]
2
2
-
-
b1
SR_DEC_LN
SR_SCR_LN
SELECT_RF
SUP_LANE_
DYN_ALIGN
_F10_LN1
SRC_LN1
POL_LN1
FORCE_
SEL_NIT_ERR_LN10
LANE_SEL_LN0[1:0]
_ENA
SYN
1
1
-
b0
SR_DEC_LN
SR_SCR_LN
SELECT_RF
FORCE_ALI
_F10_LN0
SRC_LN0
POL_LN0 00000000 00h
FORCE_
EN_SCR
SR_ILA
GN
0
0
Default
Bin
00000000 00h
00000000 00h
00000000 00h
00000000 00h
00000000 00h
00000000 00h
10000011 83h
00000000 00h
00000000 00h
00000000 00h
00000000 00h
00000000 00h
11100100 E4h
00000000 00h
00000000 00h
Hex