ADSP-BF531WBBCZ-4A AD [Analog Devices], ADSP-BF531WBBCZ-4A Datasheet - Page 27

• Manufacturer Part Number: ADSP-BF531WBBCZ-4A
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

SDRAM Interface Timing
Table 18. SDRAM Interface Timing
1
2
3
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
SDRAM timing for
Refer to
Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
SSDAT
HSDAT
SCLK
SCLKH
SCLKL
DCAD
HCAD
DSDAT
ENSDAT
Table 14 on Page 23
DATA Setup Before CLKOUT
DATA Hold After CLKOUT
CLKOUT Period
CLKOUT Width High
CLKOUT Width Low
Command, ADDR, Data Delay After CLKOUT
Command, ADDR, Data Hold After CLKOUT
Data Disable After CLKOUT
Data Enable After CLKOUT
T
JUNCTION
CMND ADDR
DATA(OUT)
=
DATA(IN)
(OUT)
for maximum f
CLKOUT
125°C is limited to 100 MHz.
2
SCLK
1
at various V
t
SSDAT
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
DDINT
Rev. D | Page 27 of 60 | August 2006
.
1
Figure 13. SDRAM Interface Timing
3
t
DCAD
t
SCLK
t
t
H SDAT
ENSDAT
t
t
DC AD
HCAD
t
SCLKL
ADSP-BF531/ADSP-BF532
V
Min
2.1
0.0
10.0
2.5
2.5
1.0
1.0
DDEXT
t
t
DSDAT
SCLKH
= 1.8 V V
Max
6.0
6.0
t
HCAD
Min
1.5
0.8
7.5
2.5
2.5
1.0
1.0
DDEXT
= 2.5 V/3.3 V
Max
4.0
4.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns