ADSP-BF531WBBCZ-4A AD [Analog Devices], ADSP-BF531WBBCZ-4A Datasheet - Page 40
ADSP-BF531WBBCZ-4A
Manufacturer Part Number
ADSP-BF531WBBCZ-4A
Description
Blackfin Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet
1.ADSP-BF531WBBCZ-4A.pdf
(60 pages)
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ADSP-BF531/ADSP-BF532
Programmable Flags Cycle Timing
Table 27
Table 27. Programmable Flags Cycle Timing
Parameter
Timing Requirement
t
Switching Characteristic
t
WFI
DFO
and
Flag Input Pulse Width
Flag Output Delay from CLKOUT Low
PF (OUTPUT)
CLKOUT
PF (INPUT)
Figure 25
describe programmable flag operations.
Figure 25. Programmable Flags Cycle Timing
Rev. D | Page 40 of 60 | August 2006
t
DFO
t
WFI
FLAG INPUT
FLAG OUTPUT
V
Min
t
SCLK
DDEXT
+ 1
= 1.8 V V
Max Min
6
t
SCLK
DDEXT
+ 1
= 2.5 V/3.3 V
Max
6
Unit
ns
ns
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