XC2VP4 XILINX [Xilinx, Inc], XC2VP4 Datasheet - Page 107

• Manufacturer Part Number: XC2VP4
• Description: Virtex-II Pro and Virtex-II Pro X Platform FPGAs
• Manufacturer: XILINX [Xilinx, Inc]

Block SelectRAM+ Switching Characteristics
Table 44: Block SelectRAM+ Switching Characteristics
TBUF Switching Characteristics
Table 45: TBUF Switching Characteristics
DS083 (v4.7) November 5, 2007
Product Specification
Notes:
1. A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
Sequential Delays
Setup and Hold Times Before Clock CLK
Clock CLK
Combinatorial Delays
Clock CLK to DOUT output
ADDR inputs
DIN inputs
EN input
RST input
WEN input
CLKA to CLKB setup time for different ports
Minimum Pulse Width, High
Minimum Pulse Width, Low
IN input to OUT output
TRI input to OUT output high-impedance
TRI input to valid data on OUT output
if a “0” is listed, there is no positive hold time.
R
Description
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
www.xilinx.com
T
T
T
T
T
BWCK
BDCK
BRCK
BACK
BECK
Symbol
T
T
T
T
BPWH
BPWL
BCKO
BCCS
Symbol
/T
/T
/T
/T
/T
T
BCKA
BCKD
BCKE
BCKR
BCKW
T
T
OFF
ON
IO
0.27/ 0.22
0.20/ 0.22
0.28/ 0.00
0.28/ 0.00
0.33/ 0.00
1.41
1.17
1.17
1.0
-7
0.88
0.48
0.48
-7
Speed Grade
Speed Grade
0.31/ 0.25
0.23/ 0.25
0.32/ 0.00
0.32/ 0.00
0.35/ 0.00
1.50
1.30
1.30
1.0
-6
1.01
0.55
0.55
-6
0.35/ 0.28
0.26/ 0.28
0.35/ 0.00
0.35/ 0.00
0.39/ 0.00
1.68
1.50
1.50
1.0
1.12
0.61
0.61
-5
-5
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
Units
36