MPC8358E_11 FREESCALE [Freescale Semiconductor, Inc], MPC8358E_11 Datasheet - Page 94

• Manufacturer Part Number: MPC8358E_11
• Description: PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Document Revision History
26 Document Revision History
Table 80
94
Number
Rev.
3
2
1
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
01/2011
03/2010
12/2007 Initial release.
provides a revision history for this hardware specification.
Date
• Updated references to the LCRR register throughout
• Removed references to DDR DLL mode in
• Changed “Junction-to-Case” to “Junction-to-Ambient” in
• Changed references to RCWH[PCICKEN] to RCWH[PCICKDRV].
• In
• Added
• In
• In
• Updated the title of
• In
• In
• In
• In
• In
• In
• In
• Added
• Updated
• In
• In
• In
• In
Specifications.”
Junction-to-Ambient Thermal
Resistance of PBGA Package,” titles.
removed watermark.
20–80% and 80–20% of the voltage supply, respectively.
TEST pin.
Nomenclature,” updated for 400 MHz QE part offering
PowerQUICC Design Checklist,’ for proper pin termination and usage.”
or CLKIN/2 is driven out on the PCI_CLK_OUTn signals.”
Table 65 “MPC8358E PBGA Pinout Listing,
Section 4, “Clock Input
Table
Table
Table
Table 26–Table
Table 37,
Table
Table
Section 21.3, “Pinout
Section 22,
Section 22.1, “System PLL
Table
Figure
Figure
Section 4.3, “Gigabit Reference Clock Input
2, added extended temperature characteristics.
4, “MPC8358E PBGA Core Power Dissipation
19, “DDR and DDR2 SDRAM Input AC Timing Specifications Mode,” changed table subtitle.
44, “I2C AC Electrical Specifications,” changed units to “ns” for t
67, “Operating Frequencies for the PBGA Package,” and
78, added extended temperature characteristics.
Section 8.1.1, “10/100/1000 Ethernet DC Electrical
52, “Mechanical Dimensions and Bottom Surface Nomenclature of the PBGA Package,”
“IEEE 1588 Timer AC Specifications,” changed first parameter to “Timer clock frequency.”
5, “DDR Input Timing Diagram.”
“Clocking,” removed statement: “The OCCR[PCICDn] parameters select whether CLKIN
29, and
Table
Listings,” added sentence stating “Refer to AN3097, ‘MPC8360/MPC8358E
Table 80. Revision History
Timing,” added note regarding rise/fall time on QUICC Engine block input pins.
18,”DDR SDRAM Input AC Timing Specifications.”
Table 32—Table
Resistance,” and
Configuration,” updated the system VCO frequency conditions.
Substantive Change(s)
Section 6.2.2, “DDR and DDR2 SDRAM Output AC Timing
33, changed the rise and fall time specifications to reference
added note 7: “This pin must always be tied to GND” to the
Table
Timing.”
76, “Heat Sinks and Junction-to-Ambient Thermal
1
,” added row for 400/266/400 part offering.
Section 23.2.4, “Heat Sinks and
Characteristics.”
Table
78, “Part Numbering
I2DVKH
Freescale Semiconductor
.