CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 30

• Manufacturer Part Number: CY8C32_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

Note The two VCCD pins must be connected together with as short a trace as possible. A trace under the device is recommended,
as shown in
You can power the device in internally regulated mode, where the voltage applied to the V
regulators provide the core voltages. In this mode, do not apply power to the V
pins.
You can also power the device in externally regulated mode, that is, by directly powering the V
the V
this configuration is 1.71 V to 1.89 V. After power up in this configuration, the internal regulators are on by default, and should be
disabled to reduce power consumption.
Document Number: 001-56955 Rev. *N
DDD
pins should be shorted to the V
Figure
2-8.
VDDIO1
VSSB
VDDIO2
0.1µF
0.1µF
I/ O Supply
I/O Supply
Domain
Digital
CCD
pins and the V
Figure 6-4. PSoC Power System
1 µF
Regulators
Digital
DDA
0.1µF
pin should be shorted to the V
VDDD
VDDD
0.1µF
I/O Supply
Regulator
Regulator
Regulator
Regulator
Analog
Hibernate
Domain
Analog
CCx
Sleep
I2C
I/O Supply
pins, and do not tie the V
0.1µF
DDx
PSoC
VDDIO0
VDDA
VCCA
CCD
pins is as high as 5.5 V, and the internal
VSSA
VDDIO3
CCA
and V
®
pin. The allowed supply range in
VDDIO0
3: CY8C32 Family
CCA
1 µF
0.1µF
VDDA
pins. In this configuration,
0.1µF
DDx
Data Sheet
pins to the V
Page 30 of 122
CCx