CY8C5246LTI-029 CYPRESS [Cypress Semiconductor], CY8C5246LTI-029 Datasheet - Page 3

• Manufacturer Part Number: CY8C5246LTI-029
• Manufacturer: CYPRESS [Cypress Semiconductor]

1. Architectural Overview
Introducing the CY8C52 family of ultra low power, flash Programmable System-on-Chip (PSoC) devices, part of a scalable 8-bit
PSoC 3 and 32-bit PSoC 5 platform. The CY8C52 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Figure 1-1
CY8C52 family. They are:
Document Number: 001-66236 Rev. **
ARM Cortex-M3 CPU subsystem
Nonvolatile subsystem
Programming, debug, and test subsystem
Inputs and outputs
Clocking
Power
Digital subsystem
Analog subsystem
0. 5 to 5.5 V
( Optional )
32.768 KHz
( Optional )
( Optional )
4- 25 MHz
on page 3 illustrates the major components of the
System Wide
Resources
Clocking System
Power Management
Xtal
Osc
IMO
1.8 V LDO
POR and
Power
Timer
System
Sleep
Wake
SMP
WDT
LVD
RTC
ILO
and
Digital Interconnect
PRELIMINARY
EEPROM
8- Bit
I 2C Slave
Figure 1-1. Simplified Block Diagram
Timer
UART
Temperature
EMIF
LCD Direct
UDB
UDB
UDB
UDB
(TIA, PGA, Mixer etc)
CapSense
Memory System
Sensor
Drive
4 x SC / CT Blocks
Universal Digital Block Array (24 x UDB)
Quadrature Decoder
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
4 x DAC
Digital
12- Bit SPI
Logic
12- Bit PWM
Block
Filter
Digital System
UDB
UDB
UDB
UDB
16- Bit
PWM
System Bus
16- Bit PRS
8- Bit
Timer
PSoC’s digital subsystem provides half of its unique
configurability. It connects a digital signal from any peripheral to
any pin through the digital system interconnect (DSI). It also
provides functional flexibility through an array of small, fast, low
power UDBs. PSoC Creator provides a library of pre-built and
tested standard digital peripherals (UART, SPI, LIN, PRS, CRC,
timer, counter, PWM, AND, OR, and so on) that are mapped to
the UDB array. The designer can also easily create a digital
circuit using boolean primitives by means of graphical design
entry. Each UDB contains programmable array logic
(PAL)/programmable logic device (PLD) functionality, together
with a small state machine engine to support a wide variety of
peripherals.
Analog Interconnect
UDB
UDB
UDB
UDB
Logic
PSoC
Cortex M3 CPU
Analog System
ADCs
Controller
8051 or
Cache
UDB
UDB
UDB
UDB
CPU System
®
UDB
UDB
UDB
UDB
SAR
ADC
Del Sig
2 x
ADC
1 x
5: CY8C52 Family Datasheet
Controller
Interrupt
PHUB
DMA
Counter
Timer
PWM
4 x
CAN
2.0
Opamp
CMP
4 x
4 x
Program &
Boundary
Program
Debug
Debug &
+
+
-
-
Trace
FS USB
Scan
Master /
Slave
I2C
2.0
USB
PHY
Opamp
3 per
Page 3 of 94
22 Ω
[+] Feedback
[+] Feedback
[+] Feedback