CY8C5246LTI-029 CYPRESS [Cypress Semiconductor], CY8C5246LTI-029 Datasheet - Page 54

• Manufacturer Part Number: CY8C5246LTI-029
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 11-2. DC Specifications (continued)
Table 11-3. AC Specifications
Document Number: 001-66236 Rev. **
F
F
Svdd
T
T
T
T
Parameter
Notes
Parameter
18. If V
19. Based on device characterization (Not production tested).
STARTUP
SLEEP
IO_INIT
CPU
BUSCLK
HIBERNATE
CCD
and V
Hibernate Mode
Hibernate mode current
All regulators and oscillators off.
SRAM retention
GPIO interrupts are active
Boost = OFF
SIO pins in single ended input,
unregulated output mode
CPU frequency
Bus frequency
V
Time from V
≥ IPOR to I/O ports set to their reset
states
Time from V
≥ PRES to CPU executing code at
reset vector
Wakeup from limited active mode –
Application of non-LVD interrupt to
beginning of execution of next CPU
instruction
Wakeup form hibernate mode –
Application of external interrupt to
beginning of execution of next CPU
instruction
DD
CCA
ramp rate
are externally regulated, the voltage difference between V
Description
Description
DDD
DDD
/V
/V
[18]
DDA
DDA
[19]
/V
/V
CCD
CCD
/V
/V
CCA
CCA
PRELIMINARY
1.71 V ≤ V
1.71 V ≤ V
V
V
mode 12 MHz typ.
V
V
V
CCA
DDA
DD
DD
DD
= V
= V
= V
/V
/V
CCD
DDD
DDIO
DDIO
DDIO
DDD
DDD
, no PLL used, IMO boot
= regulated from
Conditions
= 1.71–1.95 V T= –40 °C
= 4.5–5.5 V
= 2.7–3.6 V
CCD
≤ 5.5 V
≤ 5.5 V
Conditions
and V
PSoC
CCA
must be less than 50 mV.
T= –40 °C
T= 25 °C
T= 85 °C
T= –40 °C
T= 25 °C
T= 85 °C
T= 25 °C
T= 85 °C
®
5: CY8C52 Family Datasheet
Min
DC
DC
–
–
–
–
–
Min
–
–
–
–
–
–
–
–
–
Typ
20
–
–
–
–
–
–
Typ
300
–
–
–
–
–
–
–
–
40.01
40.01
Max
100
Max
10
66
1
–
–
–
–
–
–
–
–
–
–
Page 54 of 94
Units
Units
MHz
MHz
V/ns
nA
nA
nA
nA
nA
nA
nA
nA
nA
µs
µs
µs
µs
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