MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 241

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MC68HC705V12CFN

Manufacturer Part Number
MC68HC705V12CFN
Description
The Motorola microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
17.12 BDLC Transmitter VPW Symbol Timings (BARD) Bits BO[3:0] = 0111
17.13 BDLC Receiver VPW Symbol Timings (BARD) Bits BO[3:0] = 0111
MC68HC705V12
MOTOROLA
Passive logic 0
Passive logic 1
Active logic 0
Active logic 1
Start of frame (SOF)
End of data (EOD)
End of frame (EOF)
Inter-frame separator (IFS)
Passive logic 0
Passive logic 1
Active logic 0
Active logic 1
Start of frame (SOF)
End of data (EOD)
End of frame (EOF)
Break
1. f
1. f
BDLC
BDLC
= 1.048576 MHz or 1.0 MHz
= 1.048576 MHz or 1.0 MHz
NOTE:
Characteristic
Characteristic
Rev. 3.0
The receiver symbol timing boundaries are subject to an uncertainty of
1 t
BDLC
(1)
(1)
s due to sampling considerations.
BDLC Transmitter VPW Symbol Timings (BARD) Bits BO[3:0] = 0111
Electrical Specifications
Number
Number
10
11
12
13
14
15
16
17
10
11
12
13
14
15
16
18
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
TRVP
TRVP
TRVA
TRVA
TRVA
TRVP
t
t
TRV
TRV
TVP
TVP
TVA
TVA
TVA
TVP
TV
TV
4
6
1
2
1
2
3
3
4
6
1
2
1
2
3
3
Min
Min
126
126
198
198
278
298
163
163
239
239
62
62
34
96
96
34
Typ
Typ
128
128
200
200
280
300
128
128
200
200
280
64
64
64
64
Electrical Specifications
Advance Information
Max
Max
130
130
202
202
282
302
163
163
239
239
320
66
66
96
96
Unit
Unit
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
241

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