MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 84

• Manufacturer Part Number: MC68HC705V12CFN
• Description: The Motorola microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

Parallel Input/Output (I/O)
7.4.2 Port B Data Direction Register
7.5 Port C
7.5.1 Port C Data Register
Advance Information
84
INTERNAL HC05
DATA BUS
RREAD $0002
WRITE $0006
WRITE $0002
READ $0006
RESET
(RST)
Each port B I/O pin may be programmed as an input by clearing the
corresponding bit in the DDRB or programmed as an output by setting
the corresponding bit in the DDRB. The DDRB can be accessed at
address $0005. The DDRB is cleared by reset.
Port C is an 8-bit bidirectional port shared with the IRQ interrupt
subsystem as shown in
corresponding bits in a data direction register and a data register. The
port C data register (PORTC) is located at address $0002. The port C
data direction register (DDRC) is located at address $0006. Reset clears
DDRC. The port C data register is unaffected by reset.
Each port C I/O pin has a corresponding bit in the port C data register
(PORTC). When a port C pin is programmed as an output, the state of
the corresponding data register bit determines the state of the output pin.
When a port C pin is programmed as an input, any read of the port C
Figure 7-3. Port C I/O Circuitry
DATA DIRECTION
REGISTER BIT
REGISTER BIT
DATA
Parallel Input/Output (I/O)
Figure
SEE
Figure 4-2. IRQ Function Block Diagram
7-3. Each pin is controlled by the
TO IRQ SUBSYSTEM
OUTPUT
MC68HC705V12
MOTOROLA
—
PIN
I/O
Rev. 3.0