MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 90

• Manufacturer Part Number: MC68HC705V12CFN
• Description: The Motorola microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

Core Timer
Advance Information
90
TOFE — Timer Overflow Enable Bit
RTIE — Real-Time Interrupt Enable Bit
TOFC — Timer Overflow Flag Clear Bit
RTFC — Real-Time Interrupt Flag Clear Bit
RT1–RT0 — Real-Time Interrupt Rate Select Bit
2.1 MHz
0.97 ms
1.95 ms
3.90 ms
7.80 ms
When this bit is set, a CPU interrupt request is generated when the
CTOF bit is set. Reset clears this bit.
When this bit is set, a CPU interrupt request is generated when the
RTIF bit is set. Reset clears this bit.
When a 1 is written to this bit, CTOF is cleared. Writing a 0 has no
effect on the CTOF bit. This bit always reads as 0.
When a 1 is written to this bit, RTIF is cleared. Writing a 0 has no
effect on the RTIF bit. This bit always reads as 0.
These two bits select one of four taps from the real-time interrupt
(RTI) circuit. See
with a 2.1- and 1.05-MHz bus clock. Reset sets bits RT1 and RT0,
which selects the lowest periodic rate, and gives the maximum time
in which to alter these bits if necessary. Take care when altering RT0
and RT1 if the timeout period is imminent or uncertain. If the selected
tap is modified during a cycle in which the counter is switching, an
RTIF could be missed or an additional one could be generated. To
avoid problems, the COP should be cleared before changing RTI
taps.
RTI Rate
1.05 MHz
15.60 ms
1.95 ms
3.90 ms
7.80 ms
Table 8-1. RTI and COP Rates at 2.1 MHz
Core Timer
Table 8-1
2
2
2
2
11
12
13
14
/E
/E
/E
/E
RT1–RT0
which shows the available interrupt rates
00
01
10
11
(2
(2
(2
(2
14
15
16
17
–2
–2
–2
–2
11
12
13
14
Minimum COP Rates
)/E
)/E
)/E
)/E
MC68HC705V12
13.65 ms
27.31 ms
54.61 ms
2.1 MHz
6.83 ms
MOTOROLA
109.23 ms
1.05 MHz
13.65 ms
27.31 ms
54.61 ms
—
Rev. 3.0