FDC37B787QF SMSC [SMSC Corporation], FDC37B787QF Datasheet - Page 178

• Manufacturer Part Number: FDC37B787QF
• Description: Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
• Manufacturer: SMSC [SMSC Corporation]

I/O Base Address Configuration Register
LOGICAL
NUMBER
DEVICE
0x00
0x03
0x04
0x05
TABLE 73 - I/O BASE ADDRESS CONFIGURATION REGISTER DESCRIPTION
Serial Port
Serial Port
LOGICAL
DEVICE
(Note 4)
Parallel
FDC
Port
1
2
REGISTER
0x60,0x61
0x60,0x61
0x60,0x61
0x60,0x61
INDEX
the base address is on an 8-
ON 8 BYTE BOUNDARIES
ON 4 BYTE BOUNDARIES
ON 8 BYTE BOUNDARIES
ON 8 BYTE BOUNDARIES
ON 8 BYTE BOUNDARIES
EPP is only available when
(all modes supported,
(EPP Not supported)
[0x100:0x0FFC]
[0x100:0x0FF8]
[0x100:0x0FF8]
[0x100:0x0FF8]
[0x100:0x0FF8]
byte boundary)
181
BASE I/O
(NOTE3)
RANGE
or
+0 : SRA
+1 : SRB
+2 : DOR
+3 : TSR
+4 : MSR/DSR
+5 : FIFO
+7 : DIR/CCR
+0 : Data|ecpAfifo
+1 : Status
+2 : Control
+3 : EPP Address
+4 : EPP Data 0
+5 : EPP Data 1
+6 : EPP Data 2
+7 : EPP Data 3
+400h : cfifo|ecpDfifo|tfifo
|cnfgA
+401h : cnfgB
+402h : ecr
+0 : RB/TB|LSB div
+1 : IER|MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
+0 : RB/TB|LSB div
+1 : IER|MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
BASE OFFSETS
FIXED