ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 237

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

4.19.6.3
4.19.6.4
4921C–AUTO–01/07
TWI Status Register – TWSR
TWI Data Register – TWDR
Table 4-88.
To calculate bit rates, see
used in the equation.
In Transmit mode, TWDR contains the next byte to be transmitted. In Receive mode, the TWDR
contains the last byte received. It is writable while the TWI is not in the process of shifting a byte.
This occurs when the TWI Interrupt Flag (TWINT) is set by hardware. Note that the Data Regis-
ter cannot be initialized by the user before the first interrupt occurs. The data in TWDR remains
stable as long as TWINT is set. While data is shifted out, data on the bus is simultaneously
shifted in. TWDR always contains the last byte present on the bus, except after a wake up from
a sleep mode by the TWI interrupt. In this case, the contents of TWDR is undefined. In the case
of a lost bus arbitration, no data is lost in the transition from Master to Slave. Handling of the
ACK bit is controlled automatically by the TWI logic, the CPU cannot access the ACK bit directly.
TWPS1
0
0
1
1
• Bits 7..3 – TWS: TWI Status
• Bit 2 – Res: Reserved Bit
• Bits 1..0 – TWPS: TWI Prescaler Bits
• Bits 7..0 – TWD: TWI Data Register
Initial Value
Initial Value
Read/Write
Read/Write
These 5 bits reflect the status of the TWI logic and the 2-wire Serial Bus. The different status
codes are described later in this section. Note that the value read from TWSR contains both
the 5-bit status value and the 2-bit prescaler value. The application designer should mask
the prescaler bits to zero when checking the Status bits. This makes status checking inde-
pendent of prescaler setting. This approach is used in this datasheet, unless otherwise
noted.
This bit is reserved and will always read as zero.
These bits can be read and written, and control the bit rate prescaler.
These eight bits constitute the next data byte to be transmitted, or the latest data byte
received on the 2-wire Serial Bus.
Bit
Bit
TWI Bit Rate Prescaler
TWS7
TWD7
R/W
R
7
1
7
1
TWD6
TWS6
R/W
TWPS0
0
1
0
1
R
6
1
6
1
“Bit Rate Generator Unit” on page
TWD5
TWS5
R/W
R
5
1
5
1
TWD4
TWS4
R/W
R
4
1
4
1
Prescaler Value
1
4
16
64
TWD3
TWS3
R/W
R
3
1
3
1
ATA6602/ATA6603
TWD2
R/W
2
1
R
2
–
0
234. The value of TWPS1..0 is
TWPS1
TWD1
R/W
R/W
1
1
1
0
TWPS0
TWD0
R/W
R/W
0
1
0
0
TWDR
TWSR
237