ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 350

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ATA6602-PLQW

Manufacturer Part Number
ATA6602-PLQW
Description
Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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ATA6602-PLQW
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5.5
350
DATA TRANSFER INSTRUCTIONS
Note:
Mnemonics
MOVW
MOV
SPM
SES
SEV
SEH
CLH
LDD
LDD
STD
STD
LPM
LPM
LPM
OUT
CLS
SET
LDS
STS
CLV
CLT
CLI
LDI
LD
LD
LD
LD
LD
LD
LD
LD
LD
ST
ST
ST
ST
ST
ST
ST
ST
ST
IN
Instruction Set Summary (Continued)
1. These instructions are only available in ATA6603
ATA6602/ATA6603
Operands
Rd, Z+q
Rd,Y+q
Rd, X+
Rd, - X
Rd, Y+
Rd, - Y
Rd, Z+
Y+q,Rr
Z+q,Rr
Rd, Z+
Rd, Rr
Rd, Rr
X+, Rr
- X, Rr
Y+, Rr
Rd, -Z
- Y, Rr
Z+, Rr
-Z, Rr
Rd, K
Rd, X
Rd, Y
Rd, Z
Rd, Z
Rd, P
Rd, k
X, Rr
Y, Rr
Z, Rr
k, Rr
P, Rr
Description
Global Interrupt Disable
Set Signed Test Flag
Clear Signed Test Flag
Set Twos Complement Overflow.
Clear Twos Complement Overflow
Set T in SREG
Clear T in SREG
Set Half Carry Flag in SREG
Clear Half Carry Flag in SREG
Move Between Registers
Copy Register Word
Load Immediate
Load Indirect
Load Indirect and Post-Inc.
Load Indirect and Pre-Dec.
Load Indirect
Load Indirect and Post-Inc.
Load Indirect and Pre-Dec.
Load Indirect with Displacement
Load Indirect
Load Indirect and Post-Inc.
Load Indirect and Pre-Dec.
Load Indirect with Displacement
Load Direct from SRAM
Store Indirect
Store Indirect and Post-Inc.
Store Indirect and Pre-Dec.
Store Indirect
Store Indirect and Post-Inc.
Store Indirect and Pre-Dec.
Store Indirect with Displacement
Store Indirect
Store Indirect and Post-Inc.
Store Indirect with Displacement
Load Program Memory
Load Program Memory
Load Program Memory and Post-Inc
Store Program Memory
In Port
Out Port
Store Indirect and Pre-Dec.
Store Direct to SRAM
Operation
I
S
S
V
V
T
T
H
H
Rd
Rd+1:Rd
Rd
Rd
Rd
X
Rd
Rd
Y
Rd
Rd
Rd
Z
Rd
Rd
(X)
(X)
X
(Y)
(Y)
Y
(Y + q)
(Z)
(Z)
Z
(Z + q)
(k)
R0
Rd
Rd
(Z)
Rd
P
0
1
0
Z - 1, Rd
Z - 1, (Z)
1
0
1
0
X - 1, Rd
Y - 1, Rd
X - 1, (X)
Y - 1, (Y)
Rr
1
0
Rr
Rr
Rr, Z
R1:R0
Rr
(X)
(X), X
(Y)
(Y), Y
(Y + q)
(Z)
(Z), Z
(Z + q)
Rr
Rr, Y
(Z)
(Z)
(Z), Z
P
Rr
Rr, X
K
(k)
Rr
Rr
Rr+1:Rr
Z + 1
Y + 1
X + 1
Z+1
Z+1
X + 1
Y + 1
(Z)
Rr
(X)
(Y)
Rr
Rr
Flags
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
S
S
V
V
T
T
H
H
I
4921C–AUTO–01/07
#Clocks
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
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2
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3
1
1
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