ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 244

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 4-88. Data Transfer in Master Transmitter Mode
244
ATA6602/ATA6603
SDA
SCL
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one to trans-
mit a START condition and TWINT must be written to one to clear the TWINT Flag. The TWI will
then test the 2-wire Serial Bus and generate a START condition as soon as the bus becomes
free. After a START condition has been transmitted, the TWINT Flag is set by hardware, and the
status code in TWSR will be 0x08 (see
SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit
should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing
the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes
is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not,
the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis-
ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the
transfer. This is accomplished by writing the following value to TWCR:
This scheme is repeated until the last byte has been sent and the transfer is ended by generat-
ing a STOP condition or a repeated START condition. A STOP condition is generated by writing
the following value to TWCR:
TRANSMITTER
Device 1
MASTER
TWCR
TWCR
TWCR
TWCR
value
value
value
value
Table 4-90 on page
TWINT
TWINT
TWINT
TWINT
Device 2
RECEIVER
SLAVE
1
1
1
1
TWEA
TWEA
TWEA
TWEA
X
X
X
X
Device 3
245.
TWSTA
TWSTA
TWSTA
TWSTA
1
0
0
0
........
Table 4-90 on page
TWSTO
TWSTO
TWSTO
TWSTO
Device n
0
0
0
1
V
CC
TWWC
TWWC
TWWC
TWWC
X
X
X
X
R1
245). In order to enter MT mode,
TWEN
TWEN
TWEN
TWEN
1
1
1
1
R2
–
0
–
0
–
0
–
0
4921C–AUTO–01/07
TWIE
TWIE
TWIE
TWIE
X
X
X
X