PSF21150 INFINEON [Infineon Technologies AG], PSF21150 Datasheet - Page 233

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PSF21150

Manufacturer Part Number
PSF21150
Description
IPAC-X ISDN PC ADAPTER CIRCUIT
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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4.6.4
Value after reset: 00
CMDRB
RMC ... Receive Message Complete
Reaction to RPF (Receive Pool Full) or RME (Receive Message End) interrupt. By
setting this bit, the microcontroller confirms that it has fetched the data, and indicates that
the corresponding space in the RFIFOB may be released.
RRES ... Receiver Reset
HDLC receiver is reset, the RFIFOB is cleared of any data.
XTF ... Transmit Transparent Frame
After having written up to 32 or 64 bytes (EXMB.XFBS) to the XFIFOB, the
microcontroller initiates the transmission of a transparent frame by setting this bit to ’1’.
The opening flag is automatically added to the message by the IPAC-X.
XME ... Transmit Message End
By setting this bit to ’1’ the microcontroller indicates that the data block written last to the
XFIFOB completes the corresponding frame. The IPAC-X terminates the transmission
by appending the CRC and the closing flag sequence to the data.
XRES ... Transmitter Reset
The B-channel HDLC transmitter is reset and the XFIFOB is cleared of any data. This
command can be used by the microcontroller to abort a frame currently in transmission.
Note: After an XPR interrupt further data has to be written to the XFIFOB and the
Data Sheet
appropriate Transmit Command (XTF) has to be written to the CMDRB register
again to continue transmission, when the current frame is not yet complete (see
also XPR in ISTAB).
During frame transmission, the 0-bit insertion according to the HDLC bit-stuffing
mechanism is done automatically.
7
CMDRB - Command Register B-channels
RMC RRES
H
0
0
233
XTF
0
Detailed Register Description
XME XRES
0
PSB 21150
PSF 21150
WR (71/81)
2000-07-21

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