PSF21150 INFINEON [Infineon Technologies AG], PSF21150 Datasheet - Page 78

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PSF21150

Manufacturer Part Number
PSF21150
Description
IPAC-X ISDN PC ADAPTER CIRCUIT
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Figure 42
3.5.1.2
F3 Pending Deactivation
State after deactivation from the S/T interface by info 0. Note that no activation from the
terminal side is possible starting from this state. A ’DI’ command has to be issued to enter
the state ’Deactivated State’.
F3 Deactivated State
The S/T interface is deactivated and the clocks are deactivated 500 µs after entering this
state and receiving info 0 if the CFS bit of the IPAC-X Configuration Register is set to “0“.
Activation is possible from the S/T interface and from the IOM-2 interface. The bit
TR_CMD.PD is set and the analog part is powered down.
F3 Power Up
The S/T interface is deactivated (info 0 on the line) and the clocks are running.
Data Sheet
TIM
DI
States (TE, LT-T)
Test Mode i
TMA
State Transition Diagram of Unconditional Transitions (TE, LT-T)
it
i
SCP
SSP
SCP
SSP
*
TIM
DI
TIM
DI
Loop A Activated
Loop A Closed
RSY
ARL ARL
AIL
i3
i3
ARL
i3
78
ARL
*
*
i3
Description of Functional Blocks
TIM
DI
RES RES
i0
Reset
State
Any
RES
*
PSB 21150
PSF 21150
RST
2000-07-21
statem_te_aloop_s.vsd

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