PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 61

• Manufacturer Part Number: PSD813F1A-12J
• Description: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 30):
Figure 30. Port C Structure
Note: 1. ISP or battery back-up.
MCU I/O Mode
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
CPLD Input – via the Input Macrocells (IMC)
Address In – Additional high address inputs
using the Input Macrocells (IMC).
In-System Programming (ISP) – JTAG port
can be enabled for programming/erase of the
PSD device. (See the section entitled
PROGRAMMING IN-CIRCUIT USING THE
MCELLBC [ 7:0 ]
ENABLE PRODUCT TERM ( .OE )
WR
WR
CPLD - INPUT
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
DATA IN
SPECIAL FUNCTION
DATA OUT
Port C does not support Address Out mode, and
therefore no Control Register is required.
Pin PC7 may be configured as the DBE input in
certain MCU interfaces.
1
JTAG SERIAL INTERFACE, page
more information on JTAG programming.)
Open Drain – Port C pins can be configured in
Open Drain Mode
Battery Backup features – PC2 can be
configured as a battery input pin (V
PC4 can be configured as a Battery-on Indica-
tor output pin (V
is less than V
SPECIAL FUNCTION
OUTPUT
OUTPUT
SELECT
MUX
ENABLE OUT
MACROCELL
BAT
1
INPUT
BATON
.
), indicating when V
CONFIGURATION
PORT C PIN
BIT
PSD813F1
71, for
STBY
AI02888B
61/110
).
CC