PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 86
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PSD813F1A-12J
Manufacturer Part Number
PSD813F1A-12J
Description
Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.PSD813F1A-12J.pdf
(110 pages)
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PSD813F1
Table 52. CPLD Macrocell Asynchronous Clock Mode Timing (3V devices)
Note: 1. ZPSD Versions only.
86/110
f
t
t
t
t
t
t
t
Symbol
MAXA
SA
HA
CHA
CLA
COA
ARD
MINA
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback
(f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
CNTA
)
Parameter
1/(t
Any macrocell
1/(t
1/(t
Conditions
SA
1/f
CHA
SA
+t
CNTA
+t
COA
+t
COA
CLA
–10)
)
)
Min
12
15
22
15
42
-15
Max
19.2
23.8
27
40
29
Min
13
17
25
16
49
-20
Max
16.9
20.4
24.4
46
33
Aloc
+ 4
+ 4
PT
Turbo
+ 20
+ 20
+ 20
+ 20
Off
1
Slew
Rate
– 6
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
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