PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 84

• Manufacturer Part Number: PSD813F1A-12J
• Description: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

PSD813F1
Table 50. CPLD Macrocell Synchronous Clock Mode Timing (3V devices)
Note: 1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0.
Figure 44. Asynchronous Reset / Preset
Figure 45. Asynchronous Clock Mode Timing (Product Term Clock)
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f
t
t
t
t
t
t
t
Symbol
MAX
S
H
CH
CL
CO
ARD
MIN
2. CLKIN (PD1) t
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback (f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
Parameter
CLCL
RESET/PRESET
REGISTERED
= t
OUTPUT
REGISTER
CLOCK
CH
INPUT
OUTPUT
INPUT
+ t
CNT
CL
.
2
)
Any macrocell
1/(t
Conditions
Clock Input
Clock Input
Clock Input
1/(t
1/(t
t
S
CH
+t
CH
S
tCHA
+t
+t
CO
+t
CO
CL
–10)
CL
)
)
tARP
Min
27
15
15
29
tARPW
0
-15
tCLA
Max
17.8
19.6
33.3
35
29
tSA
Min
35
16
16
32
0
tHA
-20
tCOA
Max
14.7
17.2
31.2
39
33
Aloc
+ 4
+ 4
PT
AI02859
AI02864
Turbo
+ 20
Off
Slew
rate
– 6
1
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns