PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 83
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PSD813F1A-12J
Manufacturer Part Number
PSD813F1A-12J
Description
Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.PSD813F1A-12J.pdf
(110 pages)
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Part Number:
PSD813F1A-12JI
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Table 49. CPLD Macrocell Synchronous Clock Mode Timing (5V devices)
Note: 1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0. Decrement times by given amount.
f
t
t
t
t
t
t
t
Symbol
MAX
S
H
CH
CL
CO
ARD
MIN
2. CLKIN (PD1) t
Maximum
Frequency
External
Feedback
Maximum
Frequency
Internal
Feedback
(f
Maximum
Frequency
Pipelined Data
Input Setup
Time
Input Hold Time
Clock High
Time
Clock Low Time
Clock to Output
Delay
CPLD Array
Delay
Minimum Clock
Period
CNT
Parameter
)
2
CLCL
= t
CH
+ t
Any macrocell
1/(t
Conditions
Clock Input
Clock Input
Clock Input
1/(t
CL
1/(t
t
S
.
CH
+t
CH
S
+t
+t
CO
+t
CL
CO
–10)
CL
)
)
Min
15
10
10
20
0
-90
Max
30.3
43.4
50.0
18
16
0
8
0
Min
18
12
12
24
0
-12
41.67
Max
26.3
35.7
20
18
Min
20
15
15
30
0
-15
31.25
Max
23.8
33.3
22
22
Fast
Aloc
+ 2
+ 2
PT
Turbo
+ 10
Off
PSD813F1
Slew
rate
– 2
1
83/110
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
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