PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 63
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PSD813F1A-12J
Manufacturer Part Number
PSD813F1A-12J
Description
Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.PSD813F1A-12J.pdf
(110 pages)
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External Chip Select
The CPLD also provides three External Chip Se-
lect (ECS0-ECS2) outputs on Port D pins that can
be used to select external devices. Each External
Chip Select (ECS0-ECS2) consists of one product
Figure 32. Port D External Chip Select Signals
PT0
PT1
PT2
POLARITY
POLARITY
POLARITY
BIT
BIT
BIT
ENABLE (.OE)
ENABLE (.OE)
ENABLE (.OE)
term that can be configured active High or Low.
The output enable of the pin is controlled by either
the output enable product term or the Direction
Register. (See Figure 32.)
ECS0
ECS1
ECS2
DIRECTION
DIRECTION
REGISTER
DIRECTION
REGISTER
REGISTER
PD0 PIN
PD1 PIN
PD2 PIN
AI02890
PSD813F1
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