PSD813F1A-12J STMICROELECTRONICS [STMicroelectronics], PSD813F1A-12J Datasheet - Page 82

• Manufacturer Part Number: PSD813F1A-12J
• Description: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

PSD813F1
Table 48. CPLD Combinatorial Timing (3V devices)
Note: 1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0. Decrement times by given amount.
Figure 43. Synchronous Clock Mode Timing – PLD
82/110
t
t
t
t
t
t
Symbol
PD
EA
ER
ARP
ARPW
ARD
2. ZPSD versions only.
CPLD Input Pin/Feedback
to CPLD Combinatorial
Output
CPLD Input to CPLD Output
Enable
CPLD Input to CPLD Output
Disable
CPLD Register Clear or
Preset Delay
CPLD Register Clear or
Preset Pulse Width
CPLD Array Delay
Parameter
REGISTERED
OUTPUT
CLKIN
INPUT
Conditions
macrocell
Any
t CH
Min
30
-15
t CL
Max
48
43
43
48
29
t S
Min
35
t H
-20
t CO
Max
55
50
50
55
33
Aloc
+ 4
+ 4
PT
AI02860
Turbo
+ 20
+ 20
+ 20
+ 20
+ 20
Off
2
Slew
rate
– 6
– 6
– 6
– 6
1
Unit
ns
ns
ns
ns
ns
ns