HYB18L256169BF QIMONDA [Qimonda AG], HYB18L256169BF Datasheet - Page 25

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HYB18L256169BF

Manufacturer Part Number
HYB18L256169BF
Description
256-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
Table 11
Parameter
DQ and DQM input setup time
DQ input hold time
DQM input hold time
DQM write mask latency
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE to PRECHARGE command period
WRITE recovery time
PRECHARGE command period
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
Figure 25
Data Sheet
no. of clock cycles = specified delay / clock period; round up to next integer.
Timing Parameters for WRITE
WRITE Burst (CAS Latency = 2)
Symbol
t
t
t
t
DQW
t
RCD
t
RAS
25
t
t
WR
RC
RP
IS
IH
min.
1.5
0.8
0.5
67
19
45
14
19
0
- 7.5
HY[B/E]18L256169BF-7.5
max.
100k
256-Mbit Mobile-RAM
Functional Description
02032006-MP0M-7FQG
Rev. 1.02, 2006-12
Units
t
ns
ns
ns
ns
ns
ns
ns
ns
CK
Notes
1)
1)
1)
1)
1)

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