STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 17
![no-image](/images/no-image-200.jpg)
STC4130-I
Manufacturer Part Number
STC4130-I
Description
Synchronous Clock for SETS
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.STC4130-I.pdf
(44 pages)
- Current page: 17 of 44
- Download datasheet (417Kb)
Processor Interface Descriptions
The STC4130 supports four common microprocessor control interfaces: SPI, Motorola, Intel, and multiplex
parallel. The control interface mode is selected with the Bus_Mode(0/1) pins:
The following sections describe each bus mode’s interface timing:
SPI Bus Mode
The SPI interface bus mode uses the BUS_CS, BUS_ALE, BUS_WRB, and BUS_RDY pins, corresponding to
CS, SCLK, SDI, and SDO respectively, with timing as shown in figures 9 and 10:
Serial Bus Timing
SCLK
SCLK
SDI
SDO
CS
CS
SDI
t
CS
t
CS
t
Ds
t
Ds
MSB
A6
MSB
A6
1
1
t
t
Dh
Dh
A5
2
A5
2
A4
3
A4
t
3
CH
t
CH
© Copyright 2006 The Connor-Winfield Corp.
A3
4
A3
4
t
Figure 10: Serial Bus Timing, Write access
CL
Figure 9: Serial Bus Timing, Read access
t
A2
CL
5
A2
5
Bus_Mode1,
Bus_Mode0
Data Sheet #: TM084
A1
6
A1
6
00
01
10
11
A0
A0
LSB
7
7
LSB
8
1
8
0
t
DRDY
Multiplex parallel
MSB
D7
9
9
Bus Mode
All Rights Reserved
Motorola
MSB
D7
Intel
SPI
D6
10
10
Page 17 of 44
Synchronous Clock for SETS
D6
t
DHLD
D5
11
11
D5
D4
12
Specifications subject to change without notice
12
D4
D3
13
13
Rev: P02
D3
D2
14
14
STC4130
D2
Data Sheet
D1
15
15
t
CSHLD
t
CSHLD
D1
D0
LSB
16
Date: 12/5/06
16
LSB
D0
t
CSMIN
t
CSMIN
t
CSTRI
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