STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 31

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Default value: 6.
T0_Auto_Active_Ref, 0x1e (R)
Indicates the automatically selected active reference for T0, when the device is a “master”. When the device is
a “slave”, the mate’s active reference is indicated.
T0_Manual_Active_Ref, 0x1f (R/W)
Selects the active reference and the phase align mode for T0 in manual reference select mode.
Default value: 0.
T0_Long_Term_Accu_History, 0x24 (R)
Long term accumulated history for T0 relative to the TCXO. Resolution is 0.745x10
T0_Short_Term_Accu_History, 0x28 (R)
Short term accumulated history for T0 relative to the TCXO. Resolution is 0.745x10
Address
Address
Address
Address
0x1e
0x24
0x25
0x26
0x27
0x28
0x29
0x2a
0x2b
0x1f
Bit7
Bit7
Bit7
Bit7
© Copyright 2006 The Connor-Winfield Corp.
Bit6
Bit6
Bit6
Bit6
Not used
Not used
Bit 3 ~ Bit 0
0001 ~ 1100
1101 ~ 1111
0000
Data Sheet #: TM084
0x1d, bits 4 ~ 0
Bit5
Bit5
Bit5
Bit5
Bits 16 - 23 of 32 bit Short Term Holdover History
Bits 24 - 31 of 32 bit Short Term Holdover History
Bits 16 - 23 of 32 bit Long Term Holdover History
Bits 24 - 31 of 32 bit Long Term Holdover History
Bits 8 - 15 of 32 bit Short Term Holdover History
Bits 8 - 15 of 32 bit Long Term Holdover History
Bits 0 - 7 of 32 bit Short Term Holdover History
Bits 0 - 7 of 32 bit Long Term Holdover History
31 ~ 11
10
9
Freerun
Ref 1 ~ Ref 12
Holdover
Phase Align Mode/Ref selection
Bit4
Bit4
Bit4
Bit4
Bandwidth, Hz
All Rights Reserved
Reserved
0.18
0.09
Page 31 of 44
Bit3
Bit3
Bit3
Bit3
Synchronous Clock for SETS
Specifications subject to change without notice
Bit2
Bit2
Bit2
Bit2
Values from 0 - 12
Values from 0 - 15
-3
Rev: P02
3
ppb.
ppb.
STC4130
Data Sheet
Bit1
Bit1
Bit1
Bit1
Date: 12/5/06
Bit0
Bit0
Bit0
Bit0