TSI-8 AGERE [Agere Systems], TSI-8 Datasheet - Page 14

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TSI-8

Manufacturer Part Number
TSI-8
Description
8K x 8K Time-Slot Interchanger
Manufacturer
AGERE [Agere Systems]
Datasheet
TSI-8
8K x 8K Time-Slot Interchanger
6 Timing Diagrams and ac Characteristics
Figure 6-1 and Figure 6-2 describe the timing specifications for the input clocks on the TSI-8.
Table 6-1. CHICLK Timing Specifications
Table 6-2. MPUCLK Timing Specifications
14
14
* V
* V
Parameter
Parameter
IH
IH
to V
to V
t
t
t
t
t
t
t
t
t
t
1
2
2
3
4
4
5
6
7
8
IH
IH
VIL
or V
or V
IL
IL
to V
to V
t5
CHICLK Rise Time
CHICLK Width (8.192 MHz)*
CHICLK Width (16.384 MHz)*
CHICLK Fall Time
CHICLK Period (8.192 MHz)
CHICLK Period (16.384 MHz)
MPUCLK Rise Time
MPUCLK Width*
MPUCLK Fall Time
MPUCLK Period
IL
IL
.
.
VIH
Description
Description
V
IL
t
1
t6
Figure 6-2. MPUCLK Timing Specifications
V
Figure 6-1. CHICLK Timing Specifications
IH
t
2
t8
VIH
V
t
4
IH
t
7
t
3
6.06
15.2
V
48.84
24.42
Min
VIL
Min
IL
V
DD33
VDD33
50%
Hardware Design Guide, Revision 1
122.07
61.03
Typ
Typ
2
2
2
2
50%
73.24
36.62
Max
Max
7
7
7
7
November 2, 2005
Agere Systems Inc.
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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