TSI-8 AGERE [Agere Systems], TSI-8 Datasheet - Page 21

no-image

TSI-8

Manufacturer Part Number
TSI-8
Description
8K x 8K Time-Slot Interchanger
Manufacturer
AGERE [Agere Systems]
Datasheet
Hardware Design Guide, Revision 1
November 2, 2005
Table 6-5. CHI 3-State Output Control
Control in the table below refers to bits [6:4] in the Transmit_CHI_Global_Configuration register (0x0C84). This only applies
if bits 13 and 12 of the corresponding Transmit_CHI_Control register (0x0C00—0x0C3E) are set to 11. See the TSI-8 Reg-
ister Description document.
* Like edge is the reference edge (rising or falling) as defined by the Transmit_Clock_Edge bit in the Transmit_CHI_Global_Configuration (0x0C84) regis-
Agere Systems Inc.
Parameter Control
ter. See the TSI-8 Register Description document for further details.
t
t
t
20
21
22
16.384 Mbits/s
8.192 Mbits/s
8.192 Mbits/s
16.384 MHz
8.192 MHz
CHICLK
8.192 MHz
CHICLK
CHICLK
TXD
TXD
TXD
000
001
010
011
000
001
010
011
100
101
110
111
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
t
20
Figure 6-15. CHI 3-State Output Control
t
22
Reference Point
t
21
*
8K x 8K Time-Slot Interchanger
Min
105
111
50
44
38
32
50
44
38
32
99
93
Max
120
114
108
102
59
53
47
41
59
53
47
41
*
Unit
TSI-8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21

Related parts for TSI-8