KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 10

• Manufacturer Part Number: KS8893ML
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel
KS8893M/ML/MI
List of Tables
Table 1. FX and TX Mode Selection .....................................................................................................................................................22
Table 2. MDI/MDI-X Pin Definitions.......................................................................................................................................................23
Table 3. MII Signals ................................................................................................................................................................................32
Table 4: RMII Signal Description ..........................................................................................................................................................33
Table 5: RMII Signal Connections ........................................................................................................................................................34
Table 6. SNI Signals...............................................................................................................................................................................34
Table 7. MII Management Interface Frame Format .............................................................................................................................35
Table 8. Serial Management Interface (SMI) Frame Format...............................................................................................................36
Table 9: Spanning Tree States..............................................................................................................................................................37
Table 10. Special Tagging Mode Format .............................................................................................................................................38
Table 11. STPID Egress Rules (Processor to Switch Port 3)..............................................................................................................38
Table 12. STPID Egress Rules (Switch Port 3 to Processor).............................................................................................................39
Table 13. FID+DA Lookup in VLAN Mode ............................................................................................................................................40
Table 14. FID+SA Lookup in VLAN Mode ............................................................................................................................................41
Table 15. KS8893M SPI Connections...................................................................................................................................................45
Table 16. Format of Static MAC Table (8 Entries)...............................................................................................................................86
Table 17. Format of Static VLAN Table (16 Entries) ...........................................................................................................................87
Table 18. Format of Dynamic MAC Address Table (1K Entries) .......................................................................................................88
Table 19. Format of “Per Port” MIB Counters.....................................................................................................................................89
Table 20. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets..............................................................................................90
Table 21. Format of “All Port Dropped Packet” MIB Counters .........................................................................................................90
Table 22. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets ................................................................................90
Table 23. EEPROM Timing Parameters ...............................................................................................................................................95
Table 24. SNI Timing Parameters .........................................................................................................................................................96
Table 25. MAC Mode MII Timing Parameters ......................................................................................................................................97
Table 26. PHY Mode MII Timing Parameters .......................................................................................................................................98
Table 27: RMII Timing Parameters .......................................................................................................................................................99
Table 28. SPI Input Timing Parameters .............................................................................................................................................100
Table 29. SPI Output Timing Parameters ..........................................................................................................................................101
Table 30: Auto-Negotiation Timing Parameters ...............................................................................................................................102
Table 31. Reset Timing Parameters ...................................................................................................................................................103
Table 32. Transformer Selection Criteria...........................................................................................................................................105
Table 33. Qualified Single Port Magnetics ........................................................................................................................................105
Table 34. Typical Reference Crystal Characteristics .......................................................................................................................105
June 2005
10
M9999-063005