KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 44

• Manufacturer Part Number: KS8893ML
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
• Manufacturer: MICREL [Micrel Semiconductor]

I
In managed mode, the KS8893M can be configured as an I
(external controller/CPU) has complete programming access to the KS8893M’s 142 registers. Programming
access includes the Global Registers, Port Registers, Advanced Control Registers and indirect access to the
“Static MAC Table”, “VLAN Table”, “Dynamic MAC Table,” and “MIB Counters.” The tables and counters are
indirectly accessed via registers 121 to 131.
In I
is similar to addressing Atmel’s AT24C02 EEPROM’s memory locations. Details of I
related timing information can be found in the AT24C02 Datasheet.
Two fixed 8-bit device addresses are used to address the KS8893M in I
is for write. The addresses are as follow:
The following is a sample procedure for programming the KS8893M using the I
1. Enable I
2. Power up the board and assert reset to the KS8893M. After reset, the “Start Switch” bit (register 1 bit [0]) is
3. Configure the desired register settings in the KS8893M, using the I
4. Read back and verify the register settings in the KS8893M, using the I
5. Write a ‘1’ to the “Start Switch” bit to start the KS8893M with the programmed settings.
Note: The “Start Switch” bit cannot be set to ‘0’ to stop the switch after an ‘1’ is written to this bit. Thus, it is
recommended that all switch configuration settings are programmed before the “Start Switch” bit is set to ‘1’.
Some of the configuration settings, such as “Aging enable”, “Auto Negotiation Enable”, “Force Speed” and “Power
down” can be programmed after the switch has been started.
SPI Slave Serial Bus Configuration
In managed mode, the KS8893M can be configured as a SPI slave device. In this mode, a SPI master device
(external controller/CPU) has complete programming access to the KS8893M’s 142 registers. Programming
access includes the Global Registers, Port Registers, Advanced Control Registers and indirect access to the
“Static MAC Table”, “VLAN Table”, “Dynamic MAC Table” and “MIB Counters”. The tables and counters are
indirectly accessed via registers 121 to 131.
The KS8893M supports two standard SPI commands: ‘0000_0011’ for data read and ‘0000_0010’ for data write.
SPI multiple read and multiple write are also supported by the KS8893M to expedite register read back and
register configuration, respectively.
SPI multiple read is initiated when the master device continues to drive the KS8893M SPIS_N input pin (SPI
Slave Select signal) low after a byte (a register) is read. The KS8893M internal address counter increments
automatically to the next byte (next register) after the read. The next byte at the next register address is shifted
out onto the KS8893M SPIQ output pin. SPI multiple read continues until the SPI master device terminates it by
de-asserting the SPIS_N signal to the KS8893M.
Similarly, SPI multiple write is initiated when the master device continues to drive the KS8893M SPIS_N input pin
low after a byte (a register) is written. The KS8893M internal address counter increments automatically to the next
byte (next register) after the write. The next byte that is sent from the master device to the KS8893M SDA input
pin is written to the next register address. SPI multiple write continues until the SPI master device terminates it by
de-asserting the SPIS_N signal to the KS8893M.
For both SPI multiple read and multiple write, the KS8893M internal address counter wraps back to register
address zero once the highest register address is reached. This feature allows all 142 KS8893M registers to be
read, or written with a single SPI command and any initial register address.
The KS8893M is capable of supporting a 5MHz SPI bus.
2
June 2005
C Slave Serial Bus Configuration
2
C slave mode, the KS8893M operates like other I
set to ‘0’.
2
C slave mode by setting the KS8893M strap-in pins PS[1:0] (pins 100 and 101, respectively) to “01”.
1011_1111 <read>
1011_1110 <write>
2
C slave devices. Addressing the KS8893M’s 8-bit registers
44
2
C slave device. In this mode, an I
2
C write operation.
2
C slave mode. One is for read; the other
2
C read operation.
2
C slave serial bus:
2
C read/write operations and
2
C master device
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